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base repository: llvm/llvm-project
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base: 8d438cf1bfd331d70b70b3601650cfdea3c9cffb
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head repository: llvm/llvm-project
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compare: c7f5feaa75d5c0ef6c30a512edb2473f70b75e82
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  • 6 commits
  • 14 files changed
  • 4 contributors

Commits on Jan 22, 2025

  1. [RISCV] Add precommit test for #123882 

    Add MCA test for jump instructions.
    @wangpc-pp
    wangpc-pp committed Jan 22, 2025
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  2. [MCA] Use MCInstrAnalysis to analyse call/return instructions (#123882) 

    The flag set in `MCInstrDesc` is not accurate and we should use
the result of `MCInstrAnalysis`.
    @wangpc-pp
    wangpc-pp authored Jan 22, 2025
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  3. Remove incorrect CUDA defines (#123898) 

    Remove CUDA_127 and CUDA_129 defines incorrectly added in
#123398
    @sergey-kozub
    sergey-kozub authored Jan 22, 2025
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  4. [SLP][NFC] Update test for PR #118055 (#122696) 

    This patch updates the motivating test for the above PR so that it does
not conflict with urem PR #122236
    @sushgokh
    sushgokh authored Jan 22, 2025
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  5. IR/Verifier: Allow vector type in atomic load and store 

    Vector types on atomics are assumed to be invalid by the verifier. However,
this type can be valid if it is lowered by codegen.

commit-id:72529270
    @jofrn
    jofrn committed Jan 22, 2025
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  6. [SelectionDAG] Legalize <1 x T> vector types for atomic load 

    `load atomic <1 x T>` is not valid. This change legalizes
vector types of atomic load via scalarization in SelectionDAG
so that it can, for example, translate from `v1i32` to `i32`.

commit-id:5c36cc8c
    @jofrn
    jofrn committed Jan 22, 2025
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