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[MCA] Use MCInstrAnalysis to analyse call/return instructions (#123882)
The flag set in `MCInstrDesc` is not accurate and we should use the result of `MCInstrAnalysis`.
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3 files changed

+23
-17
lines changed

3 files changed

+23
-17
lines changed

llvm/lib/MCA/InstrBuilder.cpp

+8-8
Original file line numberDiff line numberDiff line change
@@ -219,11 +219,10 @@ static void initializeUsedResources(InstrDesc &ID,
219219
});
220220
}
221221

222-
static void computeMaxLatency(InstrDesc &ID, const MCInstrDesc &MCDesc,
223-
const MCSchedClassDesc &SCDesc,
224-
const MCSubtargetInfo &STI,
225-
unsigned CallLatency) {
226-
if (MCDesc.isCall()) {
222+
static void computeMaxLatency(InstrDesc &ID, const MCSchedClassDesc &SCDesc,
223+
const MCSubtargetInfo &STI, unsigned CallLatency,
224+
bool IsCall) {
225+
if (IsCall) {
227226
// We cannot estimate how long this call will take.
228227
// Artificially set an arbitrarily high latency.
229228
ID.MaxLatency = CallLatency;
@@ -599,23 +598,24 @@ InstrBuilder::createInstrDescImpl(const MCInst &MCI,
599598
ID->NumMicroOps = SCDesc.NumMicroOps;
600599
ID->SchedClassID = SchedClassID;
601600

602-
if (MCDesc.isCall() && FirstCallInst) {
601+
bool IsCall = MCIA->isCall(MCI);
602+
if (IsCall && FirstCallInst) {
603603
// We don't correctly model calls.
604604
WithColor::warning() << "found a call in the input assembly sequence.\n";
605605
WithColor::note() << "call instructions are not correctly modeled. "
606606
<< "Assume a latency of " << CallLatency << "cy.\n";
607607
FirstCallInst = false;
608608
}
609609

610-
if (MCDesc.isReturn() && FirstReturnInst) {
610+
if (MCIA->isReturn(MCI) && FirstReturnInst) {
611611
WithColor::warning() << "found a return instruction in the input"
612612
<< " assembly sequence.\n";
613613
WithColor::note() << "program counter updates are ignored.\n";
614614
FirstReturnInst = false;
615615
}
616616

617617
initializeUsedResources(*ID, SCDesc, STI, ProcResourceMasks);
618-
computeMaxLatency(*ID, MCDesc, SCDesc, STI, CallLatency);
618+
computeMaxLatency(*ID, SCDesc, STI, CallLatency, IsCall);
619619

620620
if (Error Err = verifyOperands(MCDesc, MCI))
621621
return std::move(Err);

llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp

+9
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include "llvm/MC/MCContext.h"
1616
#include "llvm/MC/MCDwarf.h"
1717
#include "llvm/MC/MCInst.h"
18+
#include "llvm/MC/MCInstrAnalysis.h"
1819
#include "llvm/MC/MCInstrInfo.h"
1920
#include "llvm/MC/MCRegisterInfo.h"
2021
#include "llvm/MC/MCStreamer.h"
@@ -243,6 +244,10 @@ createNullTargetStreamer(MCStreamer &S) {
243244
return new SystemZTargetStreamer(S);
244245
}
245246

247+
static MCInstrAnalysis *createSystemZMCInstrAnalysis(const MCInstrInfo *Info) {
248+
return new MCInstrAnalysis(Info);
249+
}
250+
246251
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetMC() {
247252
// Register the MCAsmInfo.
248253
TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
@@ -283,4 +288,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetMC() {
283288
// Register the null streamer
284289
TargetRegistry::RegisterNullTargetStreamer(getTheSystemZTarget(),
285290
createNullTargetStreamer);
291+
292+
// Register the MCInstrAnalysis.
293+
TargetRegistry::RegisterMCInstrAnalysis(getTheSystemZTarget(),
294+
createSystemZMCInstrAnalysis);
286295
}

llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s

+6-9
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,12 @@ ret
1212

1313
# CHECK: Iterations: 1
1414
# CHECK-NEXT: Instructions: 5
15-
# CHECK-NEXT: Total Cycles: 10
15+
# CHECK-NEXT: Total Cycles: 200
1616
# CHECK-NEXT: Total uOps: 5
1717

1818
# CHECK: Dispatch Width: 2
19-
# CHECK-NEXT: uOps Per Cycle: 0.50
20-
# CHECK-NEXT: IPC: 0.50
19+
# CHECK-NEXT: uOps Per Cycle: 0.03
20+
# CHECK-NEXT: IPC: 0.03
2121
# CHECK-NEXT: Block RThroughput: 5.0
2222

2323
# CHECK: Instruction Info:
@@ -58,13 +58,10 @@ ret
5858
# CHECK-NEXT: - - - 1.00 - - - - ret
5959

6060
# CHECK: Timeline view:
61-
# CHECK-NEXT: Index 0123456789
61+
# CHECK-NEXT: Index 0123
6262

63-
# CHECK: [0,0] DeeE . . j .Ltmp0
64-
# CHECK-NEXT: [0,1] .DeeE. . jal a0, .Ltmp1
65-
# CHECK-NEXT: [0,2] . DeeE . jr a0
66-
# CHECK-NEXT: [0,3] . DeeE. jalr t0, a0
67-
# CHECK-NEXT: [0,4] . .DeeE ret
63+
# CHECK: [0,0] DeeE j .Ltmp0
64+
# CHECK-NEXT: Truncated display due to cycle limit
6865

6966
# CHECK: Average Wait times (based on the timeline view):
7067
# CHECK-NEXT: [0]: Executions

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