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[DAG] extractShiftForRotate - replace assertion for shift opcode with…
… an early-out We feed the result from the first extractShiftForRotate call into the second, and that result might no longer be a shift op (usually due to constant folding). NOTE: We REALLY need to stop creating nodes on the fly inside extractShiftForRotate! Fixes Issue #57474 (cherry picked from commit eaede4b)
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | ||
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s | ||
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define void @PR57474() nounwind { | ||
; CHECK-LABEL: PR57474: | ||
; CHECK: # %bb.0: # %BB | ||
; CHECK-NEXT: pushq %rbp | ||
; CHECK-NEXT: movq %rsp, %rbp | ||
; CHECK-NEXT: movq %rsp, %rax | ||
; CHECK-NEXT: leaq -16(%rax), %rsp | ||
; CHECK-NEXT: movw $-32768, -16(%rax) # imm = 0x8000 | ||
; CHECK-NEXT: movq %rbp, %rsp | ||
; CHECK-NEXT: popq %rbp | ||
; CHECK-NEXT: retq | ||
BB: | ||
br label %BB1 | ||
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BB1: ; preds = %BB | ||
%A = alloca <1 x i16>, align 2 | ||
%L1 = load <1 x i16>, <1 x i16>* %A, align 2 | ||
%I = insertelement <1 x i16> %L1, i16 -1, i16 0 | ||
%B6 = add <1 x i16> %I, %I | ||
%B3 = srem <1 x i16> %B6, %I | ||
%B1 = add <1 x i16> %B3, %B3 | ||
%B5 = sdiv <1 x i16> %B1, %I | ||
%B4 = udiv <1 x i16> %B3, <i16 -32768> | ||
%B2 = or <1 x i16> %B4, %B5 | ||
%B = lshr <1 x i16> <i16 -32768>, %B2 | ||
store <1 x i16> %B, <1 x i16>* %A, align 2 | ||
ret void | ||
} |