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[Moore] Introduce a new operation - netOp for net declaration #6884

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merged 3 commits into from
Apr 22, 2024

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cepheus69
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@cepheus69 cepheus69 commented Apr 1, 2024

According to the IEEE 1800-2017 std, we design netOp for net declaration. Various NetKind are supported to generate in the net declaration:

  • Supply0 Supply1
  • Wire Uwire
  • WAnd WOr
  • Tri0 Tri1
  • Tri TriAnd TriOr TriReg
    The interconnect net declaration and user-defined net types are not supported yet.

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cepheus69 commented Apr 1, 2024

The netOp is mainly used for declaring NetKind elements in the module. The NetKind has:
Unknown,Wire,WAnd,WOr,Tri,TriAnd,TriOr,Tri0,Tri1,TriReg,Supply0,
Supply1,UWire,Interconnect,UserDefined

@hailongSun2000
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Thanks for helping code review in advance 😃 !

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@uenoku uenoku left a comment

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I have limited knowledge for Moore/Slang but this looks good to me 👍

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@maerhart maerhart left a comment

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I'm not familiar with all the subtleties of SystemVerilog, but here are some of my thoughts/observations.

include/circt/Dialect/Moore/MooreOps.td Outdated Show resolved Hide resolved
include/circt/Dialect/Moore/MooreOps.td Outdated Show resolved Hide resolved
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@cepheus69 cepheus69 changed the title [Moore] Introduce new operations - portOp and netOp [Moore] Introduce a new operation - netOp for net declaration Apr 7, 2024
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cepheus69 commented Apr 7, 2024

The portOp will be removed. New module Op would replace the original functionality of portOp

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Cool! Thanks for pushing on this 👍 Added a few comments.

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@cepheus69
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The netOp is mainly used for declaring NetKind elements in the module. The NetKind has: Unknown,Wire,WAnd,WOr,Tri,TriAnd,TriOr,Tri0,Tri1,TriReg,Supply0, Supply1,UWire,Interconnect,UserDefined

Mark Unknow Interconnect Userdefined as not support!

Comment on lines 64 to 69
case slang::ast::NetType::Interconnect:
case slang::ast::NetType::Unknown:
case slang::ast::NetType::UserDefined:
break;
}
llvm_unreachable("unsupported net kind");
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llvm_unreachable is weird in that it doesn't really print an error message in non-debug/non-assertion builds. It will just hint the compiler at this branch being unreachable in release builds. However, you do want to report an error to the user here. Something like the following:

static FailureOr<moore::NetKind> convertNetKind(slang::ast::NetType::NetKind kind, Location loc) {
  switch (kind) {
  // ...
  case slang::ast::NetType::Interconnect:
  case slang::ast::NetType::Unknown:
  case slang::ast::NetType::UserDefined:
    return mlir::emitError(loc, "unsupported net type `") << slang::ast::toString(kind) << "`";
  }
}

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LGTM! Thanks 🥳

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LGTM! Thanks 🥳

Thanks a lot !!! ❤️ The improved module & instance will be ready soon.

NetOp is for variable declaration. Net Types defines different types of net connections in SV. There are twelve built-in net types defined
`supply0`, `supply1`, `tri`, `triand`, `trior`, `trireg`, `tri0`, `tri1`, `uwire`, `wire`, `wand`, `wor`, and three special net types:
`interconnect`, `userdefined`, `unknown`. The special ones are marked as unsupported because we have no plan to support them currently.
Corresponding test cases have been added to the parser/print and ImportVerilog pass tests. Add two expected failed netkind test cases -
`interconnect` & `user-defined`.

Co-authored-by: Fabian Schuiki <fabian@schuiki.ch>
Co-authored-by: Hailong Sun <hailong.sun@terapines.com>
@hailongSun2000 hailongSun2000 merged commit 61a18fe into llvm:main Apr 22, 2024
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5 participants