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[LLHD] Rename insert and extract slice operations #44

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Jul 20, 2020
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[LLHD] Rename insert and extract slice operations #44

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3a9a3b3
[LLHD] Rename insert and extract slice operations to be more self-exp…
maerhart Jul 16, 2020
59e3f4a
Rename dynamic extract operations to DynExtractElementOp and DynExtra…
maerhart Jul 20, 2020
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18 changes: 9 additions & 9 deletions include/circt/Dialect/LLHD/IR/ExtractOps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
//
//===----------------------------------------------------------------------===//

def LLHD_ExtsOp : LLHD_Op<"exts", [
def LLHD_ExtractSliceOp : LLHD_Op<"extract_slice", [
NoSideEffect,
PredOpTrait<
"'start' + size of the slice have to be smaller or equal to the 'target' "
Expand All @@ -18,7 +18,7 @@ def LLHD_ExtsOp : LLHD_Op<"exts", [
]> {
let summary = "Extract a slice of consecutive elements.";
let description = [{
The `llhd.exts` operation allows access to a slice of the `$target`
The `llhd.extract_slice` operation allows access to a slice of the `$target`
operand. The `$start` attribute defines the index of the first element.
The return type is the same as `$target` but with the width of the
specified result type.
Expand All @@ -29,10 +29,10 @@ def LLHD_ExtsOp : LLHD_Op<"exts", [

```mlir
%0 = llhd.const 123 : i32
%1 = llhd.exts %0, 0 : i32 -> i2
%1 = llhd.extract_slice %0, 0 : i32 -> i2

%2 = llhd.sig %0 : i32
%3 = llhd.exts %2, 0 : !llhd.sig<i32> -> !llhd.sig<i5>
%3 = llhd.extract_slice %2, 0 : !llhd.sig<i32> -> !llhd.sig<i5>
```
}];

Expand All @@ -55,7 +55,7 @@ def LLHD_ExtsOp : LLHD_Op<"exts", [
}];
}

def LLHD_DextsOp : LLHD_Op<"dexts", [
def LLHD_DynamicExtractSliceOp : LLHD_Op<"dyn_extract_slice", [
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Seems like these should match.. either DynExtractSliceOp or dynamic_extract_slice

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I went for DynExtractSliceOp because I think it's an unambiguous abbreviation and avoids very long operation names. Thanks for taking the time to review!

NoSideEffect,
SameTypeArbitraryWidth<
"'target' and 'result' types have to match apart from their width",
Expand All @@ -66,9 +66,9 @@ def LLHD_DextsOp : LLHD_Op<"dexts", [
]> {
let summary = "Dynamically extract a slice of consecutive elements";
let description = [{
The `llhd.dexts` operation allows to dynamically access a slice of the
`$target` operand, starting at the index given by the `$start` operand.
The resulting slice length is defined by the result type.
The `llhd.dyn_extract_slice` operation allows to dynamically access a slice
of the `$target` operand, starting at the index given by the `$start`
operand. The resulting slice length is defined by the result type.
The `$target` operand kind has to match the result kind.
If `$target` is a vector, only the number of elements can change, while
the element type has to remain the same.
Expand All @@ -79,7 +79,7 @@ def LLHD_DextsOp : LLHD_Op<"dexts", [
%0 = llhd.const 0x0f0 : i12
%1 = llhd.const 4 : i3

%3 = llhd.dexts %0, %1 : (i12, i3) -> i4 // %3: 0xf
%3 = llhd.dyn_extract_slice %0, %1 : (i12, i3) -> i4 // %3: 0xf
```
}];

Expand Down
25 changes: 13 additions & 12 deletions include/circt/Dialect/LLHD/IR/InsertOps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
//
//===----------------------------------------------------------------------===//

def LLHD_InssOp : LLHD_Op<"inss", [
def LLHD_InsertSliceOp : LLHD_Op<"insert_slice", [
NoSideEffect,
AllTypesMatch<["target", "result"]>,
SameTypeArbitraryWidth<
Expand All @@ -20,8 +20,8 @@ def LLHD_InssOp : LLHD_Op<"inss", [
]> {
let summary = "Insert a slice of consecutive elements.";
let description = [{
The `llhd.inss` operation allows insertion of a slice represented by the
`$slice` operand into the `$target` operand. The `$start` attribute
The `llhd.insert_slice` operation allows insertion of a slice represented by
the `$slice` operand into the `$target` operand. The `$start` attribute
defines the index of the first element. The return type is the same as
`$target`. Note that the `$target` is not changed, but a new value with
the slice inserted is returned.
Expand All @@ -31,11 +31,11 @@ def LLHD_InssOp : LLHD_Op<"inss", [
```mlir
%itarget = llhd.const 123 : i32
%islice = llhd.const 2 : i2
%0 = llhd.inss %itarget, %islice, 0 : i32, i2
%0 = llhd.insert_slice %itarget, %islice, 0 : i32, i2

%vtarget = constant dense<[1,2,3]> : vector<3xi32>
%vslice = constant dense<[4,5]> : vector<2xi32>
%1 = llhd.inss %vtarget, %vslice, 0 : vector<3xi32>, vector<2xi32>
%1 = llhd.insert_slice %vtarget, %vslice, 0 : vector<3xi32>, vector<2xi32>
```
}];

Expand All @@ -55,7 +55,7 @@ def LLHD_InssOp : LLHD_Op<"inss", [
}];
}

def LLHD_InsfOp : LLHD_Op<"insf", [
def LLHD_InsertElementOp : LLHD_Op<"insert_element", [
NoSideEffect,
AllTypesMatch<["target", "result"]>,
PredOpTrait<"'index' has to be smaller than the 'target' size",
Expand All @@ -66,22 +66,23 @@ def LLHD_InsfOp : LLHD_Op<"insf", [
]> {
let summary = "Insert an element into a vector or tuple.";
let description = [{
The `llhd.insf` operation allows insertion of an element represented by
the `$element` operand into the `$target` operand. The `$index`
attribute defines the index where to insert the element. The return type
is the same as `$target`. Note that the `$target` is not changed, but a
The `llhd.insert_element` operation allows insertion of an element
represented by the `$element` operand into the `$target` operand. The
`$index` attribute defines the index where to insert the element. The return
type is the same as `$target`. Note that the `$target` is not changed, but a
new value with the element inserted is returned.

Example:

```mlir
%target = constant dense<[1,2,3]> : vector<3xi8>
%element = llhd.const 2 : i8
%0 = llhd.insf %target, %element, 0 : vector<3xi8>, i8
%0 = llhd.insert_element %target, %element, 0 : vector<3xi8>, i8

%tuptarget = llhd.tuple %element, %target : tuple<i8, vector<3xi8>
%newelement = llhd.const 4 : i8
%1 = llhd.insf %tuptarget, %newelement, 0 : tuple<i8, vector<3xi8>>, i8
%1 = llhd.insert_element %tuptarget, %newelement, 0
: tuple<i8, vector<3xi8>>, i8
```
}];

Expand Down
13 changes: 7 additions & 6 deletions lib/Conversion/LLHDToLLVM/LLHDToLLVM.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1286,17 +1286,18 @@ namespace {
/// Convert an llhd.exts operation. For integers, the value is shifted to the
/// start index and then truncated to the final length. For signals, a new
/// subsignal is created, pointing to the defined slice.
struct ExtsOpConversion : public ConvertToLLVMPattern {
explicit ExtsOpConversion(MLIRContext *ctx, LLVMTypeConverter &typeConverter)
: ConvertToLLVMPattern(llhd::ExtsOp::getOperationName(), ctx,
struct ExtractSliceOpConversion : public ConvertToLLVMPattern {
explicit ExtractSliceOpConversion(MLIRContext *ctx,
LLVMTypeConverter &typeConverter)
: ConvertToLLVMPattern(llhd::ExtractSliceOp::getOperationName(), ctx,
typeConverter) {}

LogicalResult
matchAndRewrite(Operation *op, ArrayRef<Value> operands,
ConversionPatternRewriter &rewriter) const override {
auto extsOp = cast<ExtsOp>(op);
auto extsOp = cast<ExtractSliceOp>(op);

ExtsOpAdaptor transformed(operands);
ExtractSliceOpAdaptor transformed(operands);

auto indexTy = typeConverter.convertType(extsOp.startAttr().getType());
auto i8PtrTy = getVoidPtrType();
Expand Down Expand Up @@ -1392,7 +1393,7 @@ void llhd::populateLLHDToLLVMConversionPatterns(
MLIRContext *ctx = converter.getDialect()->getContext();

// Value manipulation conversion patterns.
patterns.insert<ConstOpConversion, ExtsOpConversion>(ctx, converter);
patterns.insert<ConstOpConversion, ExtractSliceOpConversion>(ctx, converter);

// Bitwise conversion patterns.
patterns.insert<NotOpConversion, ShrOpConversion, ShlOpConversion>(ctx,
Expand Down
14 changes: 7 additions & 7 deletions test/Conversion/LLHDToLLVM/convert_value_manip.mlir
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Expand Up @@ -17,31 +17,31 @@ llvm.func @convert_const() {
llvm.return
}

// CHECK-LABEL: @convert_exts_int
// CHECK-LABEL: @convert_extract_slice_int
// CHECK-SAME: %[[CI32:.*]]: !llvm.i32
// CHECK-SAME: %[[CI100:.*]]: !llvm.i100
func @convert_exts_int(%cI32 : i32, %cI100 : i100) {
func @convert_extract_slice_int(%cI32 : i32, %cI100 : i100) {
// CHECK-NEXT: %[[CIND0:.*]] = llvm.mlir.constant(0 : index) : !llvm.i64
// CHECK-NEXT: %[[CIND1:.*]] = llvm.mlir.constant(10 : index) : !llvm.i64
// CHECK-NEXT: %[[ADJUST0:.*]] = llvm.trunc %[[CIND0]] : !llvm.i64 to !llvm.i32
// CHECK-NEXT: %[[SHR0:.*]] = llvm.lshr %[[CI32]], %[[ADJUST0]] : !llvm.i32
// CHECK-NEXT: %{{.*}} = llvm.trunc %[[SHR0]] : !llvm.i32 to !llvm.i10
%0 = llhd.exts %cI32, 0 : i32 -> i10
%0 = llhd.extract_slice %cI32, 0 : i32 -> i10
// CHECK-NEXT: %[[CIND2:.*]] = llvm.mlir.constant(0 : index) : !llvm.i64
// CHECK-NEXT: %[[CIND3:.*]] = llvm.mlir.constant(10 : index) : !llvm.i64
// CHECK-NEXT: %[[ADJUST1:.*]] = llvm.zext %[[CIND2]] : !llvm.i64 to !llvm.i100
// CHECK-NEXT: %[[SHR1:.*]] = llvm.lshr %[[CI100]], %[[ADJUST1]] : !llvm.i100
// CHECK-NEXT: %{{.*}} = llvm.trunc %[[SHR1]] : !llvm.i100 to !llvm.i10
%2 = llhd.exts %cI100, 0 : i100 -> i10
%2 = llhd.extract_slice %cI100, 0 : i100 -> i10

return
}

// CHECK-LABEL: @convert_exts_sig
// CHECK-LABEL: @convert_extract_slice_sig
// CHECK-SAME: %[[STATE:.*]]: !llvm<"i8*">,
// CHECK-SAME: %[[SIGTAB:.*]]: !llvm<"i32*">,
// CHECK-SAME: %[[ARGTAB:.*]]: !llvm<"i32*">
llhd.entity @convert_exts_sig (%sI32 : !llhd.sig<i32>) -> () {
llhd.entity @convert_extract_slice_sig (%sI32 : !llhd.sig<i32>) -> () {
// CHECK-NEXT: %[[IDX0:.*]] = llvm.mlir.constant(0 : i32) : !llvm.i32
// CHECK-NEXT: %[[GEP0:.*]] = llvm.getelementptr %[[ARGTAB]][%[[IDX0]]] : (!llvm<"i32*">, !llvm.i32) -> !llvm<"i32*">
// CHECK-NEXT: %[[L0:.*]] = llvm.load %[[GEP0]] : !llvm<"i32*">
Expand All @@ -62,5 +62,5 @@ llhd.entity @convert_exts_sig (%sI32 : !llhd.sig<i32>) -> () {
// CHECK-NEXT: %[[INTTTOPTR0:.*]] = llvm.inttoptr %[[ADD0]] : !llvm.i64 to !llvm<"i8*">
// CHECK-NEXT: %[[BYTEOFFSET0:.*]] = llvm.urem %[[IDX2]], %[[C2]] : !llvm.i64
// CHECK-NEXT: %{{.*}} = llvm.call @add_subsignal(%[[STATE]], %[[L0]], %[[INTTTOPTR0]], %[[LEN0]], %[[BYTEOFFSET0]]) : (!llvm<"i8*">, !llvm.i32, !llvm<"i8*">, !llvm.i64, !llvm.i64) -> !llvm.i32
%0 = llhd.exts %sI32, 0 : !llhd.sig<i32> -> !llhd.sig<i10>
%0 = llhd.extract_slice %sI32, 0 : !llhd.sig<i32> -> !llhd.sig<i10>
}
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