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[SYCL][UR] Add UR bindings #8400

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Merged
merged 3 commits into from
Mar 14, 2023
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jandres742
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jandres742 commented Feb 17, 2023

To merge after #8315

Commit of interest here:
942c9e5

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bader commented Feb 18, 2023

@jandres742, I restarted pre-commit checks. OpenCL CPU results were invalid due to infrastructure issue. Sorry for inconvenience.

NOTE: failure on GPU seems to be related to the change though.

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Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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Rebased.

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@jandres742 jandres742 marked this pull request as ready for review March 10, 2023 01:21
@jandres742 jandres742 requested review from a team as code owners March 10, 2023 01:21
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@smaslov-intel please review.

@jandres742 jandres742 changed the title Updateur bindings [SYCL][UR] Add UR bindings Mar 10, 2023
@@ -0,0 +1,52 @@
//===--------- ur_level_zero.hpp - Level Zero Adapter -----------------===//
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I will update these headers for all files with the each file's name.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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LGTM

#include <cassert>
#include <list>
#include <map>
#include <stdarg.h>
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nit: do we need all those includes (e.g. stdarg.h)? Probably some of the could be moved to .cpp file or even removed?

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thanks @igchor . Not actually needed at the moment, I can remove them and then add them as needed.

@@ -0,0 +1,15 @@
//===--------- ur_level_zero_native.cpp - Level Zero Adapter ----------===//
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What will "native" be for?

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not sure at the moment. in the local development I have been doing I haven't used this file actually. I can remove it and add it later if needed.

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LGTM

@igchor : addressed comments. Please check.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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@intel/llvm-reviewers-runtime : please review/approve/merge this

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LGTM!

@steffenlarsen steffenlarsen merged commit 7ee2f26 into intel:sycl Mar 14, 2023
veselypeta pushed a commit to veselypeta/llvm that referenced this pull request Sep 21, 2023
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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5 participants