Skip to content

[SYCL][ESIMD] Add ESIMD support for compile time hardware dispatch #7919

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Merged
merged 1 commit into from
Jan 5, 2023
Merged

[SYCL][ESIMD] Add ESIMD support for compile time hardware dispatch #7919

merged 1 commit into from
Jan 5, 2023

Conversation

fineg74
Copy link
Contributor

@fineg74 fineg74 commented Jan 4, 2023

This PR adds support for if_architecture<> to ESIMD kernels

@fineg74 fineg74 requested review from a team as code owners January 4, 2023 20:15
@fineg74 fineg74 requested a review from againull January 4, 2023 20:15
@fineg74 fineg74 mentioned this pull request Jan 4, 2023
Merged
@fineg74
Copy link
Contributor Author

fineg74 commented Jan 4, 2023

Complementary test PR: intel/llvm-test-suite#1486

@fineg74 fineg74 temporarily deployed to aws January 4, 2023 20:39 — with GitHub Actions Inactive
@fineg74 fineg74 temporarily deployed to aws January 4, 2023 21:10 — with GitHub Actions Inactive
@againull againull mentioned this pull request Jan 4, 2023
Merged
@againull
Copy link
Contributor

againull commented Jan 4, 2023

CI failure on HIP SYCL :: Regression/half_operators.cpp is unrelated and expected to be fixed by: intel/llvm-test-suite#1487

@bader
Copy link
Contributor

bader commented Jan 4, 2023

CI failure on HIP SYCL :: Regression/half_operators.cpp is unrelated and expected to be fixed by: intel/llvm-test-suite#1487

Thanks! That's the way to handle it. 👍 🥇

@againull againull merged commit 7a81119 into intel:sycl Jan 5, 2023
@fineg74 fineg74 deleted the hardwareDispatch branch January 5, 2023 17:44
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@v-klochkov v-klochkov v-klochkov approved these changes

@againull againull Awaiting requested review from againull againull is a code owner automatically assigned from intel/llvm-reviewers-runtime

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
4 participants
@fineg74 @againull @bader @v-klochkov