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[ESIMD] Fix sampler/stream parameter handling for ESIMD kernels #5165

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Merged
merged 11 commits into from
Jan 21, 2022
Merged

[ESIMD] Fix sampler/stream parameter handling for ESIMD kernels #5165

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804c052
sampler/stream class with esimd
zahiraam Dec 16, 2021
96a5b7d
Respond to review comment
zahiraam Dec 17, 2021
be2a869
Fix typo in LIT test
zahiraam Dec 17, 2021
b4b243b
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zahiraam Jan 14, 2022
f2a095e
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zahiraam Jan 17, 2022
f33dee6
Fix conflicts
zahiraam Jan 17, 2022
637cde4
Merge remote-tracking branch 'remote/sycl' into simd-attr-sampler
zahiraam Jan 18, 2022
92e16ca
Fix formatting issue
zahiraam Jan 18, 2022
c332316
Responded to reviews
zahiraam Jan 19, 2022
45dcd20
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zahiraam Jan 19, 2022
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zahiraam Jan 20, 2022
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4 changes: 3 additions & 1 deletion clang/lib/Sema/SemaSYCL.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2253,7 +2253,9 @@ class SyclKernelArgsSizeChecker : public SyclKernelFieldHandler {
const CXXRecordDecl *RecordDecl = FieldTy->getAsCXXRecordDecl();
assert(RecordDecl && "The type must be a RecordDecl");
llvm::StringLiteral MethodName =
IsSIMD ? InitESIMDMethodName : InitMethodName;
(IsSIMD && Util::isSyclType(FieldTy, "accessor", true /*Tmp*/))
? InitESIMDMethodName
: InitMethodName;
CXXMethodDecl *InitMethod = getMethodByName(RecordDecl, MethodName);
assert(InitMethod && "The type must have the __init method");
for (const ParmVarDecl *Param : InitMethod->parameters())
Expand Down
23 changes: 23 additions & 0 deletions clang/test/CodeGenSYCL/esimd-special-class.cpp
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@@ -0,0 +1,23 @@
// RUN: %clang_cc1 -fsycl-is-device \
// RUN: -internal-isystem %S/Inputs -triple spir64-unknown-unknown \
// RUN: -disable-llvm-passes -emit-llvm %s -o - %s | FileCheck --enable-var-scope %s

#include "sycl.hpp"
using namespace cl::sycl;
void test() {

queue q;

q.submit([&](handler &h) {
cl::sycl::sampler smplr;
cl::sycl::stream Stream(1024, 128, h);

// CHECK: define {{.*}}spir_kernel void @{{.*}}esimd_kernel({{.*}}) #0 !kernel_arg_addr_space ![[NUM:[0-9]+]] !kernel_arg_access_qual ![[NUM1:[0-9]+]] !kernel_arg_type ![[NUM2:[0-9]+]] !kernel_arg_base_type ![[NUM2:[0-9]+]] !kernel_arg_type_qual ![[NUM3:[0-9]+]] !kernel_arg_accessor_ptr ![[NUM4:[0-9]+]] !sycl_explicit_simd ![[NUM5:[0-9]+]] !intel_reqd_sub_group_size ![[NUM6:[0-9]+]]
h.single_task<class esimd_kernel>(
[=]() [[intel::sycl_explicit_simd]] { smplr.use(); });
// CHECK: define {{.*}}spir_kernel void @{{.*}}StreamTester({{.*}}) #0 !kernel_arg_addr_space ![[NUM:[0-9]+]] !kernel_arg_access_qual ![[NUM1:[0-9]+]] !kernel_arg_type ![[NUM2:[0-9]+]] !kernel_arg_base_type ![[NUM2:[0-9]+]] !kernel_arg_type_qual ![[NUM3:[0-9]+]] !kernel_arg_accessor_ptr ![[NUM4:[0-9]+]] !sycl_explicit_simd ![[NUM5:[0-9]+]] !intel_reqd_sub_group_size ![[NUM6:[0-9]+]]
h.single_task<class StreamTester>([=]()
[[intel::sycl_explicit_simd]] { Stream << "one"
<< "two"; });
});
}