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Commits on Dec 27, 2024

• Make Nary*IfNeeded variants keep the original order of the operands when uniquifying.

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Commits on Dec 26, 2024

• Make block stitching insert FIFO instantiations for depth=0 FIFOs.

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Commits on Dec 19, 2024

• Fix bug where DCE would remove invoke nodes, which could result in function side-effects being optimized away.

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Commits on Dec 18, 2024

• Give better error when DSLX bytecode interpreter fails to index.

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• Make accessor use const pointer.

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• Make internal channel operations ignore IO delay.

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Commits on Dec 2, 2024

• Allow block JIT to compile blocks that have a function/proc with the same name.

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Commits on Nov 23, 2024

• Fix broken test.

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Commits on Nov 15, 2024

• Add a better error message to CHECK() failure.

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Commits on Nov 9, 2024

• Fix incorrect serialization of channel fifo config.

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Commits on Nov 5, 2024

• Drop superfluous constant.

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Commits on Oct 30, 2024

• Refactor JIT to reduce reliance on Package.

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• Make node functions for input nodes.

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• Make TypeManager movable.

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Commits on Oct 25, 2024

• Add additional_output_delay_ps and refactor IO delay in the scheduler.

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• Clear cached registers values after setting them in the block jit wrapper.

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Commits on Oct 15, 2024

• Clear the temporary register cache after setting a register.

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• Change how we rename keys in the block JIT's register name map.

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Commits on Oct 5, 2024

• Make codegen implement shra as a function.

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• [vast] Represent single-bit signed bitvectors as scalars.

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Commits on Oct 4, 2024

• Add some missing fields to IR viz's node attributes

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Commits on Oct 2, 2024

• Fix infinite loop between strength reduction and DCE.

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Commits on Oct 1, 2024

• [xlscc] Don't const-prop so much during short circuiting.

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• Convert delay example to use multi-proc codegen.

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Commits on Sep 27, 2024

• Fix block IR -> verilog for instantiations with array types.

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• Allow channel metadata to be referenced from multiple blocks.

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• RET_CHECK that extern types aren't used with arrays.

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Commits on Sep 26, 2024

• Make FifoConfig constexpr-constructible.

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• Clean up some documentation in codegen.

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• Add default fifo config option to IR conversion.

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• Encapsulate ir converter options in a proto.

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• [xlscc] Use visitor for short circuit logic.

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• Make the default dslx stdlib path an inline constexpr std::string_view.

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Commits on Sep 24, 2024

• [xlscc] Reuse z3 IR translators.

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Commits on Sep 10, 2024

• Shatter proc state when they are small arrays.

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