Improve benchmarking infrastructure

[lpawelcz]

This is an umbrella issue for tracking progress and discussing tasks relevant to improving existing benchmarking infrastructure and providing new features that would improve the experience.

The objective here is to prepare a solution which would improve the process of developing DSLX design with awareness of physical design limitations. It would be good to have an easy way of defining flows which would gather a number of design metrics useful in design development. This could be done with a dashboard rule (#1137) which runs various benchmarks and gathers the result in a form of html report.
Such solution would for sure be useful for example in the development of ZSTD codec (#1211).

One of the most important performance metrics is the minimal clock period allowed for the design. However, obtaining this metric in the accurate variant requires sampling multiple clock period values for a given design through Physical Design Flow done by OpenROAD and checking if timings are met. For that, an integration with a parameter optimization framework Vizier (#1160) would be a great addition.

In current form both efforts have a common component of executing various benchmarks and fetching performance metrics from them. Dashboard uses this for preparing HTML reports, while Vizier integration performs similar steps to evaluate suggested sets of parameter values.
I believe that this component should be extracted into a separate tool, as per suggestion from #1160 (comment), it should be usable outside of bazel, possibly something in the form of a run_benchmark.py from #963.

Dashboard rule should be easy to extend with additional metrics as suggested in #1137 (comment) and #1137 (comment)

One of the issues regarding Physical Design flow is the difference between implementation in bazel_rules_hdl and in OpenROAD-Flow-Scripts which is described in hdl/bazel_rules_hdl#239.

The initial list of related issues and pull requests is presented below (includes inline links visible above):

• Dashboard for aggregating RLE/DBE test results #1058 & Generate dashboard using test results #1137
• [WIP] Vizier integration #1160
• run_benchmarks is referenced in the documentation and the codebase but is not available #963
• external: Physical Design flow implementation: Comparing with OpenROAD-flow-scripts hdl/bazel_rules_hdl#239
• Add targets for writing GDS files #1031
• Add DSLX Zstandard Codec #1211
• Add example of DSLX design parameterization based on proto files #1183
• xls/build_rules: Add top to the list of valid opt_ir flags #964
• external: Python handling: use rules_python hermetic toolchains hdl/bazel_rules_hdl#209 & Use hermetic python hdl/bazel_rules_hdl#240
• place_and_route: detailed_routing: Add reports hdl/bazel_rules_hdl#247
• P&R: Run estimate_parasitics before clock repair hdl/bazel_rules_hdl#249
• P&R: Add set_propagated_clock before detail_route hdl/bazel_rules_hdl#250
• P&R: Move remove_buffers pass to floorplan stage hdl/bazel_rules_hdl#251
• Synthesis: Insert tie cells during synthesis hdl/bazel_rules_hdl#252
• Synthesis: Add fa/ha extract and techmap pass hdl/bazel_rules_hdl#253
• Synthesis: Use ABC script from ORFS hdl/bazel_rules_hdl#254
• dependency_support: bump bazel_rules_hdl #1230

CC @proppy