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Changed to split xtensa-lx6-rt, add AES and add output svd to repo #33

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merged 4 commits into from
Jun 9, 2020

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arjanmels
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  • Updated for split xtensa-lx6-rt
  • Added AES peripheral (not included in header files), because it causes issues with new svd parser for svd2rust
  • Added output svd file to repo (remove from .gitignore) because it is used in testing svd2rust.

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arjanmels commented Jun 8, 2020

@MabezDev I just entered the PR for svd2rust (rust-embedded/svd2rust#448)

This PR request depends on that one as I renamed the CPU to XtensaLX6 (from ESP32), so includes a change to the makefile. (Also the reason Travis CI fails.)

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MabezDev commented Jun 9, 2020

the svd2rust PR just merged, mind updating the ci to use that? I think you can pass --rev to pick a specific commit

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I'll take a look

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@MabezDev I just bumped the code by amending the latest commit: passes now. (I don't think there is a need to include a specific rev: guess we should try to keep up to date with latest svd2rust.)

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MabezDev commented Jun 9, 2020

LGTM! Thanks.

@MabezDev MabezDev merged commit c9a53f6 into esp-rs:master Jun 9, 2020
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MabezDev commented Jun 9, 2020

I've also published 0.5.0 including these changes.

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