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Implement binary encoding for POWER10 PC-relative loads and stores #5371

Merged
merged 2 commits into from
Jul 22, 2020
Merged

Implement binary encoding for POWER10 PC-relative loads and stores #5371

merged 2 commits into from
Jul 22, 2020

Commits on Jul 16, 2020

  1. Implement P10 PC-relative loads/stores relative to labels 

    In POWER10, a number of new prefixed load and store instructions have
been added. These allow for 34-bit offsets, but crucially they also have
a bit that causes the load/store to occur relative to the address of the
current instruction. This can be used in a number of interesting ways
and will allow us to completely remove the pTOC on POWER10 systems,
since we can replace pTOC loads with PC-relative loads.

Support for using these PC-relative loads and stores to load at an
offset from a TR::LabelSymbol has now been added to the Power codegen.

Signed-off-by: Ben Thomas <ben@benthomas.ca>
    @aviansie-ben
    aviansie-ben committed Jul 16, 2020
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  2. Implement PC-relative loads/stores via Trg1Imm and Src1 

    Previously, PC-relative loads and stores could only be encoded by giving
their offset relative to a label. Now, support has been added to specify
the offset directly. While this may seem less than useful since it's not
normally possible to know exact offsets to surrounding instructions due
to e.g. boundary avoidance for prefixed instructions, there is one
particular use case: when the displacement is meant to be patched, it is
necessary to force a displacement of 0 to be used, which cannot be done
using labels.

Signed-off-by: Ben Thomas <ben@benthomas.ca>
    @aviansie-ben
    aviansie-ben committed Jul 16, 2020
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