Add a emitIns_S_R_R to handling more temporary reg

src/coreclr/jit/codegencommon.cpp

@@ -793,11 +793,7 @@ template void Compiler::compChangeLife<true>(VARSET_VALARG_TP newLife);
  */
 void CodeGenInterface::spillReg(var_types type, TempDsc* tmp, regNumber reg)
 {
-#ifdef TARGET_RISCV64
-    GetEmitter()->emitIns_S_R(ins_Store(type), emitActualTypeSize(type), reg, REG_NA, tmp->tdTempNum(), 0);
-#else
     GetEmitter()->emitIns_S_R(ins_Store(type), emitActualTypeSize(type), reg, tmp->tdTempNum(), 0);
-#endif
 }
 
 /*****************************************************************************
@@ -3561,11 +3557,7 @@ void CodeGen::genFnPrologCalleeRegArgs(regNumber xtraReg, bool* pXtraRegClobbere
             // Since slot is typically 1, baseOffset is typically 0
             int baseOffset = (regArgTab[argNum].slot - 1) * slotSize;
 
-#ifdef TARGET_RISCV64
-            GetEmitter()->emitIns_S_R(ins_Store(storeType), size, srcRegNum, REG_NA, varNum, baseOffset);
-#else
             GetEmitter()->emitIns_S_R(ins_Store(storeType), size, srcRegNum, varNum, baseOffset);
-#endif
 
 #ifndef UNIX_AMD64_ABI
             // Check if we are writing past the end of the struct
@@ -4676,12 +4668,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
                     if (layout->IsGCPtr(i))
                     {
                         GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE,
-#ifdef TARGET_RISCV64
-                                                  genGetZeroReg(initReg, pInitRegZeroed), REG_NA, varNum,
-                                                  i * REGSIZE_BYTES);
-#else
                                                   genGetZeroReg(initReg, pInitRegZeroed), varNum, i * REGSIZE_BYTES);
-#endif
                     }
                 }
             }
@@ -4694,22 +4681,14 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
                 unsigned i;
                 for (i = 0; i + REGSIZE_BYTES <= lclSize; i += REGSIZE_BYTES)
                 {
-#ifdef TARGET_RISCV64
-                    GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, zeroReg, REG_NA, varNum, i);
-#else
                     GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, zeroReg, varNum, i);
-#endif
                 }
 
 #ifdef TARGET_64BIT
                 assert(i == lclSize || (i + sizeof(int) == lclSize));
                 if (i != lclSize)
                 {
-#ifdef TARGET_RISCV64
-                    GetEmitter()->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, zeroReg, REG_NA, varNum, i);
-#else
                     GetEmitter()->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, zeroReg, varNum, i);
-#endif
                     i += sizeof(int);
                 }
 #endif // TARGET_64BIT
@@ -6059,11 +6038,7 @@ void CodeGen::genFnProlog()
 
     if (compiler->info.compPublishStubParam)
     {
-#ifdef TARGET_RISCV64
-        GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SECRET_STUB_PARAM, REG_NA,
-#else
         GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SECRET_STUB_PARAM,
-#endif
                                   compiler->lvaStubArgumentVar, 0);
         assert(intRegState.rsCalleeRegArgMaskLiveIn & RBM_SECRET_STUB_PARAM);
 
@@ -6098,13 +6073,8 @@ void CodeGen::genFnProlog()
             initRegZeroed = true;
         }
 
-#ifdef TARGET_RISCV64
-        GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, initReg, REG_NA, compiler->lvaShadowSPslotsVar,
-                                  firstSlotOffs);
-#else
         GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, initReg, compiler->lvaShadowSPslotsVar,
                                   firstSlotOffs);
-#endif
     }
 
 #endif // !FEATURE_EH_FUNCLETS
@@ -6115,11 +6085,7 @@ void CodeGen::genFnProlog()
     // Initialize the LocalAllocSP slot if there is localloc in the function.
     if (compiler->lvaLocAllocSPvar != BAD_VAR_NUM)
     {
-#ifdef TARGET_RISCV64
-        GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SPBASE, REG_NA, compiler->lvaLocAllocSPvar, 0);
-#else
         GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SPBASE, compiler->lvaLocAllocSPvar, 0);
-#endif
     }
 #endif // JIT32_GCENCODER
 
@@ -6365,11 +6331,7 @@ void CodeGen::genFnProlog()
         }
         else
         {
-#ifdef TARGET_RISCV64
-            GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_EAX, REG_NA, argsStartVar, 0);
-#else
             GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_EAX, argsStartVar, 0);
-#endif
         }
     }
 
@@ -6381,11 +6343,7 @@ void CodeGen::genFnProlog()
         assert(compiler->lvaReturnSpCheck != BAD_VAR_NUM);
         assert(compiler->lvaGetDesc(compiler->lvaReturnSpCheck)->lvDoNotEnregister);
         assert(compiler->lvaGetDesc(compiler->lvaReturnSpCheck)->lvOnFrame);
-#ifdef TARGET_RISCV64
-        GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SPBASE, REG_NA, compiler->lvaReturnSpCheck, 0);
-#else
         GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SPBASE, compiler->lvaReturnSpCheck, 0);
-#endif
     }
 #endif // defined(DEBUG) && defined(TARGET_XARCH)
 
@@ -8204,11 +8162,7 @@ void CodeGen::genMultiRegStoreToLocal(GenTreeLclVar* lclNode)
                 {
                     // A byte field passed in a long register should be written on the stack as a byte.
                     instruction storeIns = ins_StoreFromSrc(reg, destType);
-#ifdef TARGET_RISCV64
-                    GetEmitter()->emitIns_S_R(storeIns, emitTypeSize(destType), reg, REG_NA, fieldLclNum, 0);
-#else
                     GetEmitter()->emitIns_S_R(storeIns, emitTypeSize(destType), reg, fieldLclNum, 0);
-#endif
                 }
             }
             fieldVarDsc->SetRegNum(varReg);
@@ -8222,11 +8176,7 @@ void CodeGen::genMultiRegStoreToLocal(GenTreeLclVar* lclNode)
 // Several fields could be passed in one register, copy using the register type.
 // It could rewrite memory outside of the fields but local on the stack are rounded to POINTER_SIZE so
 // it is safe to store a long register into a byte field as it is known that we have enough padding after.
-#ifdef TARGET_RISCV64
-            GetEmitter()->emitIns_S_R(ins_Store(srcType), emitTypeSize(srcType), reg, REG_NA, lclNum, offset);
-#else
             GetEmitter()->emitIns_S_R(ins_Store(srcType), emitTypeSize(srcType), reg, lclNum, offset);
-#endif
             offset += genTypeSize(srcType);
 
 #ifdef DEBUG
@@ -8492,11 +8442,7 @@ void CodeGen::genStackPointerCheck(bool      doStackPointerCheck,
             assert(regTmp != REG_NA);
             GetEmitter()->emitIns_Mov(INS_mov, EA_PTRSIZE, regTmp, REG_SPBASE, /* canSkip */ false);
             GetEmitter()->emitIns_R_I(INS_sub, EA_PTRSIZE, regTmp, offset);
-#ifdef TARGET_RISCV64
-            GetEmitter()->emitIns_S_R(INS_cmp, EA_PTRSIZE, regTmp, REG_NA, lvaStackPointerVar, 0);
-#else
             GetEmitter()->emitIns_S_R(INS_cmp, EA_PTRSIZE, regTmp, lvaStackPointerVar, 0);
-#endif
         }
         else
         {
@@ -9409,23 +9355,14 @@ void CodeGen::genPoisonFrame(regMaskTP regLiveIn)
 #ifdef TARGET_64BIT
                 if ((offs % 8) == 0 && end - offs >= 8)
                 {
-#ifdef TARGET_RISCV64
-                    GetEmitter()->emitIns_S_R(ins_Store(TYP_LONG), EA_8BYTE, REG_SCRATCH, REG_NA, (int)varNum,
-                                              offs - addr);
-#else
                     GetEmitter()->emitIns_S_R(ins_Store(TYP_LONG), EA_8BYTE, REG_SCRATCH, (int)varNum, offs - addr);
-#endif
                     offs += 8;
                     continue;
                 }
 #endif
 
                 assert((offs % 4) == 0 && end - offs >= 4);
-#ifdef TARGET_RISCV64
-                GetEmitter()->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, REG_SCRATCH, REG_NA, (int)varNum, offs - addr);
-#else
                 GetEmitter()->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, REG_SCRATCH, (int)varNum, offs - addr);
-#endif
                 offs += 4;
             }
         }

src/coreclr/jit/codegenlinear.cpp

@@ -1869,11 +1869,7 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
 #endif // FEATURE_SIMD
         {
             emitAttr attr = emitTypeSize(type);
-#ifdef TARGET_RISCV64
-            GetEmitter()->emitIns_S_R(ins_Store(type), attr, reg, REG_NA, outArgVarNum, thisFieldOffset);
-#else
             GetEmitter()->emitIns_S_R(ins_Store(type), attr, reg, outArgVarNum, thisFieldOffset);
-#endif
         }
 
 // We can't write beyond the arg area unless this is a tail call, in which case we use
@@ -2063,15 +2059,9 @@ void CodeGen::genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclN
     // but the GTF_SPILL flag records the fact that the register value is going dead.
     if (((lclNode->gtFlags & GTF_VAR_DEF) != 0) || (!varDsc->IsAlwaysAliveInMemory()))
     {
-// Store local variable to its home location.
-// Ensure that lclVar stores are typed correctly.
-#ifdef TARGET_RISCV64
-        assert(!compiler->isSIMDTypeLocalAligned(varNum));
-        GetEmitter()->emitIns_S_R(ins_Store(type, compiler->isSIMDTypeLocalAligned(varNum)), emitTypeSize(type), regNum,
-                                  REG_NA,
-#else
+        // Store local variable to its home location.
+        // Ensure that lclVar stores are typed correctly.
         GetEmitter()->emitIns_S_R(ins_Store(type, compiler->isSIMDTypeLocalAligned(varNum)), emitTypeSize(type), regNum,
-#endif
                                   varNum, 0);
     }
 }
@@ -2592,13 +2582,8 @@ void CodeGen::genStoreLongLclVar(GenTree* treeNode)
 
     noway_assert((loVal->GetRegNum() != REG_NA) && (hiVal->GetRegNum() != REG_NA));
 
-#ifdef TARGET_RISCV64
-    emit->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, loVal->GetRegNum(), REG_NA, lclNum, 0);
-    emit->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, hiVal->GetRegNum(), REG_NA, lclNum, genTypeSize(TYP_INT));
-#else
     emit->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, loVal->GetRegNum(), lclNum, 0);
     emit->emitIns_S_R(ins_Store(TYP_INT), EA_4BYTE, hiVal->GetRegNum(), lclNum, genTypeSize(TYP_INT));
-#endif
 }
 #endif // !defined(TARGET_64BIT)