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Changes for version 0.17.27
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CVC: preparation for mini power memory reduction
CVC: checksum messages only in debug mode
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@d-m-bailey
d-m-bailey committed Jan 7, 2020
1 parent 4105804 commit 9917619
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Showing 12 changed files with 551 additions and 453 deletions.
2 changes: 1 addition & 1 deletion configure.ac
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Expand Up @@ -2,7 +2,7 @@
# Process this file with autoconf to produce a configure script.

AC_PREREQ([2.69])
AC_INIT(CVC, [0.17.25], [cvc@shuharisystem.com])
AC_INIT(CVC, [0.17.27], [cvc@shuharisystem.com])
AC_CONFIG_SRCDIR(src)
AC_CONFIG_HEADERS([config.h])
AC_USE_SYSTEM_EXTENSIONS
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2 changes: 1 addition & 1 deletion src/CConnection.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -417,7 +417,7 @@ bool CFullConnection::IsPossibleHiZ(CCvcDb * theCvcDb) {
set<string> myNmosInputs;
bool myDebug = false;
if ( theCvcDb->connectionCount_v[this->gateId].SourceDrainCount() > myCheckLimit ) return(false);
if ( theCvcDb->netVoltagePtr_v[gateId] && theCvcDb->netVoltagePtr_v[gateId]->type[INPUT_BIT] ) return(false); // input ports not possible Hi-Z
if ( theCvcDb->netVoltagePtr_v[gateId].full && theCvcDb->netVoltagePtr_v[gateId].full->type[INPUT_BIT] ) return(false); // input ports not possible Hi-Z
myNetsToCheck.push_back(this->gateId);
AddConnectedDevices(this->gateId, myPmosToCheck, myNmosToCheck, myResistorToCheck, theCvcDb->firstSource_v, theCvcDb->nextSource_v, theCvcDb->deviceType_v);
AddConnectedDevices(this->gateId, myPmosToCheck, myNmosToCheck, myResistorToCheck, theCvcDb->firstDrain_v, theCvcDb->nextDrain_v, theCvcDb->deviceType_v);
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246 changes: 123 additions & 123 deletions src/CCvcDb.cc
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18 changes: 9 additions & 9 deletions src/CCvcDb.hh
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Original file line number Diff line number Diff line change
Expand Up @@ -485,7 +485,7 @@ void CCvcDb::PrintVirtualNet(TVirtualNetVector& theVirtualNet_v, netId_t theNetI
theOutputFile << "->" << NetName(theVirtualNet_v[myNetId].nextNetId) << " r=" << theVirtualNet_v[myNetId].resistance << endl;
myNetId = theVirtualNet_v[myNetId].nextNetId;
}
if ( netVoltagePtr_v[myNetId] ) netVoltagePtr_v[myNetId]->Print(theOutputFile);
if ( netVoltagePtr_v[myNetId].full ) netVoltagePtr_v[myNetId].full->Print(theOutputFile);
theOutputFile << endl;
}

Expand All @@ -504,9 +504,9 @@ void CCvcDb::PrintAllVirtualNets(TVirtualNetVector& theMinNet_v, CVirtualNetVect
}
*/
if ( net_it == myFinalNet ) {
if ( netVoltagePtr_v[net_it] && netVoltagePtr_v[net_it]->minVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it]->minVoltage;
if ( theUseLeak && MinLeakVoltage(net_it) != netVoltagePtr_v[net_it]->minVoltage ) {
if ( netVoltagePtr_v[net_it].full && netVoltagePtr_v[net_it].full->minVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it].full->minVoltage;
if ( theUseLeak && MinLeakVoltage(net_it) != netVoltagePtr_v[net_it].full->minVoltage ) {
cout << "(" << MinLeakVoltage(net_it) << ")";
}
} else {
Expand All @@ -531,8 +531,8 @@ void CCvcDb::PrintAllVirtualNets(TVirtualNetVector& theMinNet_v, CVirtualNetVect
}
*/
if ( net_it == myFinalNet ) {
if ( netVoltagePtr_v[net_it] && netVoltagePtr_v[net_it]->simVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it]->simVoltage;
if ( netVoltagePtr_v[net_it].full && netVoltagePtr_v[net_it].full->simVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it].full->simVoltage;
} else {
cout << "??";
}
Expand All @@ -549,9 +549,9 @@ void CCvcDb::PrintAllVirtualNets(TVirtualNetVector& theMinNet_v, CVirtualNetVect
}
*/
if ( net_it == myFinalNet ) {
if ( netVoltagePtr_v[net_it] && netVoltagePtr_v[net_it]->maxVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it]->maxVoltage;
if ( theUseLeak && MaxLeakVoltage(net_it) != netVoltagePtr_v[net_it]->maxVoltage ) {
if ( netVoltagePtr_v[net_it].full && netVoltagePtr_v[net_it].full->maxVoltage != UNKNOWN_VOLTAGE ) {
cout << netVoltagePtr_v[net_it].full->maxVoltage;
if ( theUseLeak && MaxLeakVoltage(net_it) != netVoltagePtr_v[net_it].full->maxVoltage ) {
cout << "(" << MaxLeakVoltage(net_it) << ")";
}
} else {
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62 changes: 31 additions & 31 deletions src/CCvcDb_error.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -558,9 +558,9 @@ void CCvcDb::FindNmosGateVsSourceErrors() {
if ( myConnections.CheckTerminalMaxVoltages(DRAIN) ) {
if ( myConnections.minGateVoltage >= max(myConnections.maxSourceVoltage, myConnections.maxDrainVoltage) - cvcParameters.cvcGateErrorThreshold ) continue;
if ( myConnections.sourceId == myConnections.drainId ) { // capacitor check
if ( IsPower_(netVoltagePtr_v[myConnections.gateId]) && IsPower_(netVoltagePtr_v[myConnections.drainId]) ) continue; // ignore direct power capacitors
if ( ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinSourceNet.finalNetId])
|| ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinGateNet.finalNetId]) ) continue; // ignore capacitors connected to non-input/power nets
if ( IsPower_(netVoltagePtr_v[myConnections.gateId].full) && IsPower_(netVoltagePtr_v[myConnections.drainId].full) ) continue; // ignore direct power capacitors
if ( ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinSourceNet.finalNetId].full)
|| ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinGateNet.finalNetId].full) ) continue; // ignore capacitors connected to non-input/power nets
}
} else {
if ( myConnections.minGateVoltage >= myConnections.maxSourceVoltage - cvcParameters.cvcGateErrorThreshold ) continue;
Expand Down Expand Up @@ -631,9 +631,9 @@ void CCvcDb::FindPmosGateVsSourceErrors() {
if ( myConnections.CheckTerminalMinVoltages(DRAIN) ) {
if ( myConnections.maxGateVoltage <= min(myConnections.minSourceVoltage, myConnections.minDrainVoltage) + cvcParameters.cvcGateErrorThreshold ) continue;
if ( myConnections.sourceId == myConnections.drainId ) { // capacitor check
if ( IsPower_(netVoltagePtr_v[myConnections.gateId]) && IsPower_(netVoltagePtr_v[myConnections.drainId]) ) continue; // ignore direct power capacitors
if ( ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinSourceNet.finalNetId])
|| ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinGateNet.finalNetId]) ) continue; // ignore capacitors connected to non-input/power nets
if ( IsPower_(netVoltagePtr_v[myConnections.gateId].full) && IsPower_(netVoltagePtr_v[myConnections.drainId].full) ) continue; // ignore direct power capacitors
if ( ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinSourceNet.finalNetId].full)
|| ! IsInputOrPower_(netVoltagePtr_v[myConnections.masterMinGateNet.finalNetId].full) ) continue; // ignore capacitors connected to non-input/power nets
}
} else {
if ( myConnections.maxGateVoltage <= myConnections.minSourceVoltage + cvcParameters.cvcGateErrorThreshold ) continue;
Expand Down Expand Up @@ -1213,7 +1213,7 @@ void CCvcDb::FindFloatingInputErrors() {
for (netId_t net_it = 0; net_it < netCount; net_it++) { // second pass to catch floating nets caused by floating nets
if ( connectionCount_v[net_it].gateCount > 0 ) { // skips subordinate nets. only equivalent master nets have counts
if ( firstGate_v[net_it] == UNKNOWN_DEVICE ) continue;
if ( SimVoltage(net_it) != UNKNOWN_VOLTAGE || (netVoltagePtr_v[net_it] && netVoltagePtr_v[net_it]->type[INPUT_BIT]) ) continue;
if ( SimVoltage(net_it) != UNKNOWN_VOLTAGE || (netVoltagePtr_v[net_it].full && netVoltagePtr_v[net_it].full->type[INPUT_BIT]) ) continue;
if ( HasActiveConnections(net_it) ) continue;
MapDeviceNets(firstGate_v[net_it], myConnections);
if ( IsFloatingGate(myConnections) ) continue; // Already processed previously
Expand Down Expand Up @@ -1256,34 +1256,34 @@ void CCvcDb::CheckExpectedValues() {
myMaxNet(maxNet_v, myNetId);
myMaxNetId = myMaxNet.finalNetId;
if ( (*power_ppit)->expectedSim() == "open" ) {
if ( ( mySimNetId == UNKNOWN_NET || ! netVoltagePtr_v[mySimNetId] || netVoltagePtr_v[mySimNetId]->simVoltage == UNKNOWN_VOLTAGE ) &&
( myMinNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMinNetId] || netVoltagePtr_v[myMinNetId]->minVoltage == UNKNOWN_VOLTAGE || netVoltagePtr_v[myMinNetId]->type[HIZ_BIT] ||
myMaxNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMaxNetId] || netVoltagePtr_v[myMaxNetId]->maxVoltage == UNKNOWN_VOLTAGE || netVoltagePtr_v[myMaxNetId]->type[HIZ_BIT]) ) { // open match
if ( ( mySimNetId == UNKNOWN_NET || ! netVoltagePtr_v[mySimNetId].full || netVoltagePtr_v[mySimNetId].full->simVoltage == UNKNOWN_VOLTAGE ) &&
( myMinNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMinNetId].full || netVoltagePtr_v[myMinNetId].full->minVoltage == UNKNOWN_VOLTAGE || netVoltagePtr_v[myMinNetId].full->type[HIZ_BIT] ||
myMaxNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMaxNetId].full || netVoltagePtr_v[myMaxNetId].full->maxVoltage == UNKNOWN_VOLTAGE || netVoltagePtr_v[myMaxNetId].full->type[HIZ_BIT]) ) { // open match
myExpectedValueFound = true;
}
} else if ( mySimNetId != UNKNOWN_NET && netVoltagePtr_v[mySimNetId] && netVoltagePtr_v[mySimNetId]->simVoltage != UNKNOWN_VOLTAGE ) {
} else if ( mySimNetId != UNKNOWN_NET && netVoltagePtr_v[mySimNetId].full && netVoltagePtr_v[mySimNetId].full->simVoltage != UNKNOWN_VOLTAGE ) {
if ( IsValidVoltage_((*power_ppit)->expectedSim())
&& abs(String_to_Voltage((*power_ppit)->expectedSim()) - netVoltagePtr_v[mySimNetId]->simVoltage) <= cvcParameters.cvcExpectedErrorThreshold ) { // voltage match
&& abs(String_to_Voltage((*power_ppit)->expectedSim()) - netVoltagePtr_v[mySimNetId].full->simVoltage) <= cvcParameters.cvcExpectedErrorThreshold ) { // voltage match
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedSim() == NetName(mySimNetId) ) { // name match
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedSim() == string(netVoltagePtr_v[mySimNetId]->powerAlias()) ) { // alias match
} else if ( (*power_ppit)->expectedSim() == string(netVoltagePtr_v[mySimNetId].full->powerAlias()) ) { // alias match
myExpectedValueFound = true;
}
}
if ( ! myExpectedValueFound ) {
errorCount[EXPECTED_VOLTAGE]++;
errorFile << "Expected " << NetName(myNetId) << " = " << (*power_ppit)->expectedSim() << " but found ";
if ( mySimNetId != UNKNOWN_NET && netVoltagePtr_v[mySimNetId] && netVoltagePtr_v[mySimNetId]->simVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(mySimNetId) << "@" << PrintVoltage(netVoltagePtr_v[mySimNetId]->simVoltage) << endl;
if ( mySimNetId != UNKNOWN_NET && netVoltagePtr_v[mySimNetId].full && netVoltagePtr_v[mySimNetId].full->simVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(mySimNetId) << "@" << PrintVoltage(netVoltagePtr_v[mySimNetId].full->simVoltage) << endl;
} else if ( (*power_ppit)->expectedSim() == "open" ) {
bool myPrintedReason = false;
if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId] && netVoltagePtr_v[myMinNetId]->minVoltage != UNKNOWN_VOLTAGE ) {
errorFile << "(min)" << NetName(myMinNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMinNetId]->minVoltage) << " ";
if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId].full && netVoltagePtr_v[myMinNetId].full->minVoltage != UNKNOWN_VOLTAGE ) {
errorFile << "(min)" << NetName(myMinNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMinNetId].full->minVoltage) << " ";
myPrintedReason = true;
}
if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId] && netVoltagePtr_v[myMaxNetId]->maxVoltage != UNKNOWN_VOLTAGE ) {
errorFile << "(max)" << NetName(myMaxNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMaxNetId]->maxVoltage);
if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId].full && netVoltagePtr_v[myMaxNetId].full->maxVoltage != UNKNOWN_VOLTAGE ) {
errorFile << "(max)" << NetName(myMaxNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMaxNetId].full->maxVoltage);
myPrintedReason = true;
}
if ( myPrintedReason ) {
Expand All @@ -1302,23 +1302,23 @@ void CCvcDb::CheckExpectedValues() {
myExpectedValueFound = false;
if ( (*power_ppit)->expectedMin() == "open" ) {
// simVoltage in the following condition is correct. open voltages can have min/max voltages.
if ( myMinNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMinNetId] || netVoltagePtr_v[myMinNetId]->simVoltage == UNKNOWN_VOLTAGE ) { // open match
if ( myMinNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMinNetId].full || netVoltagePtr_v[myMinNetId].full->simVoltage == UNKNOWN_VOLTAGE ) { // open match
myExpectedValueFound = true;
}
} else if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId] ) {
if ( String_to_Voltage((*power_ppit)->expectedMin()) <= netVoltagePtr_v[myMinNetId]->minVoltage ) { // voltage match (anything higher than expected is ok)
} else if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId].full ) {
if ( String_to_Voltage((*power_ppit)->expectedMin()) <= netVoltagePtr_v[myMinNetId].full->minVoltage ) { // voltage match (anything higher than expected is ok)
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedMin() == NetName(myMinNetId) ) { // name match
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedMin() == string(netVoltagePtr_v[myMinNetId]->powerAlias()) ) { // alias match
} else if ( (*power_ppit)->expectedMin() == string(netVoltagePtr_v[myMinNetId].full->powerAlias()) ) { // alias match
myExpectedValueFound = true;
}
}
if ( ! myExpectedValueFound ) {
errorCount[EXPECTED_VOLTAGE]++;
errorFile << "Expected minimum " << NetName(myNetId) << " = " << (*power_ppit)->expectedMin() << " but found ";
if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId] && netVoltagePtr_v[myMinNetId]->minVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(myMinNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMinNetId]->minVoltage) << endl;
if ( myMinNetId != UNKNOWN_NET && netVoltagePtr_v[myMinNetId].full && netVoltagePtr_v[myMinNetId].full->minVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(myMinNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMinNetId].full->minVoltage) << endl;
} else {
errorFile << "unknown" << endl;
}
Expand All @@ -1330,23 +1330,23 @@ void CCvcDb::CheckExpectedValues() {
myExpectedValueFound = false;
if ( (*power_ppit)->expectedMax() == "open" ) {
// simVoltage in the following condition is correct. open voltages can have min/max voltages.
if ( myMaxNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMaxNetId] || netVoltagePtr_v[myMaxNetId]->simVoltage == UNKNOWN_VOLTAGE ) { // open match
if ( myMaxNetId == UNKNOWN_NET || ! netVoltagePtr_v[myMaxNetId].full || netVoltagePtr_v[myMaxNetId].full->simVoltage == UNKNOWN_VOLTAGE ) { // open match
myExpectedValueFound = true;
}
} else if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId] ) {
if ( String_to_Voltage((*power_ppit)->expectedMax()) >= netVoltagePtr_v[myMaxNetId]->maxVoltage ) { // voltage match (anything lower than expected is ok)
} else if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId].full ) {
if ( String_to_Voltage((*power_ppit)->expectedMax()) >= netVoltagePtr_v[myMaxNetId].full->maxVoltage ) { // voltage match (anything lower than expected is ok)
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedMax() == NetName(myMaxNetId) ) { // name match
myExpectedValueFound = true;
} else if ( (*power_ppit)->expectedMax() == string(netVoltagePtr_v[myMaxNetId]->powerAlias()) ) { // alias match
} else if ( (*power_ppit)->expectedMax() == string(netVoltagePtr_v[myMaxNetId].full->powerAlias()) ) { // alias match
myExpectedValueFound = true;
}
}
if ( ! myExpectedValueFound ) {
errorCount[EXPECTED_VOLTAGE]++;
errorFile << "Expected maximum " << NetName(myNetId) << " = " << (*power_ppit)->expectedMax() << " but found ";
if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId] && netVoltagePtr_v[myMaxNetId]->maxVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(myMaxNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMaxNetId]->maxVoltage) << endl;
if ( myMaxNetId != UNKNOWN_NET && netVoltagePtr_v[myMaxNetId].full && netVoltagePtr_v[myMaxNetId].full->maxVoltage != UNKNOWN_VOLTAGE ) {
errorFile << NetName(myMaxNetId) << "@" << PrintVoltage(netVoltagePtr_v[myMaxNetId].full->maxVoltage) << endl;
} else {
errorFile << "unknown" << endl;
}
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