Fix false-positive FP data hazards #2945
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Avoid unnecessarily stalling integer instructions that access an x register whose numeric specifier coincides with the f register destination of an earlier floating-point instruction.
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Another solution is to set rocket-chip/src/main/scala/tile/FPU.scala Line 59 in b36060e |
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The original proposal is probably less HW than changing the decoder. |
aswaterman
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Mar 14, 2022
ZenithalHourlyRate
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Feb 11, 2023
sequencer
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Feb 11, 2023
This reverts commit 89efe64.
sequencer
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This reverts commit d1067b2.
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Related issue:
Type of change: other enhancement
Impact:
Development Phase: implementation
Release Notes
Avoid false RAW/WAW hazards for integer instructions that access an
xregister whose numeric specifier coincides with thefregister destination of an earlier floating-point instruction.Example testcase:
It appears this phenomenon is not uncommon in compiled code since gcc's register allocator frequently tends to use
a0-a7(x10-x17) andfa0-fa7(f10-f17) as temporaries.