hardfloat does not natively work with chisel3 AsyncReset

[mwachs5]

Type of issue: feature request

Impact: API addition (no impact on existing code)

Development Phase: proposal

Other information

In order to use chisel3's AsyncReset type, all Module instantiations need to use chisel3.Modules, RawModule or otherwise make sure that the top level reset type is not inferred to be a Bool. This is true even if the module contains no synchronous elements. Previous work converted the parts of hardfloat that DO contain syncrhonous elements to chisel3, but did not do so for all Modules in hardfloat, so their reset type is being inferred as Bool. While this isn't really a hardware problem, firrtl won't let you connect a Bool := Reset so you get a firrtl error if you have an async reset module putting down these combinational hardfloat elements.

I will be adding some workaround code in the FPU.scala that will use withReset(false.B) around such Module instantiations. Hardfloat could be updated to declare those modules with no combinational elements as RawModules. Filing this issue to track when this is done.

If the current behavior is a bug, please provide the steps to reproduce the problem:

Try to build a config that has an chisel3.AsyncReset module which instantiates the FPU

What is the current behavior?

FIRRTL elaboration errors

What is the expected behavior?

Module is correctly generated with async resets, and no change to the combinational-only elements in hardfloat

Please tell us about your environment:

What is the use case for changing the behavior?

Being able to put down FPU in a design with async reset