`Dedup` causes extra instances to be inlined

[youngar]

Checklist

• Did you specify the current behavior?
• Did you specify the expected behavior?
• Did you provide a code example showing the problem?
• Did you describe your environment?
• Did you specify relevant external information?

What is the current behavior?

Deduplicating two modules where one has InlineAnnotation causes both modules to be inlined. I think this is a pretty well known issue with "sticky annotations". I opened a similar issue for the CIRCT FIRRTL compiler here: llvm/circt#2790

~/wsp/firrtl/utils/bin/firrtl --inline Top.Bar -i inline.fir -o inline

circuit Top:
  module Foo:
    input i : UInt<8>
    output o : UInt<8>
    wire f : UInt<8>
    f <= i
    o <= f

  module Bar:
    input i : UInt<8>
    output o : UInt<8>
    wire b : UInt<8>
    b <= i
    o <= b

  module Top:
    input i : UInt<8>
    output o : UInt<8>
    inst foo of Foo
    foo.i <= i
    inst bar of Bar
    bar.i <= i
    o <= xor(foo.o, bar.o)

Creates:

module Top(
 input  [7:0] i,
 output [7:0] o
);
 wire [7:0] foo_i;
 wire [7:0] foo_o;
 wire [7:0] bar_i;
 wire [7:0] bar_o;
 assign foo_o = foo_i;
 assign bar_o = bar_i;
 assign o = foo_o ^ bar_o;
 assign foo_i = i;
 assign bar_i = i;
endmodule

Running with --log-level=trace you can see dedup does not create a non-local annotation:

  {
    "class":"firrtl.passes.InlineAnnotation",
    "target":"Top.Bar"
  },

======== Starting firrtl.transforms.DedupModules ========
[Dedup] Top -> Top
[Dedup] Foo -> Foo
[Dedup] Bar -> Foo

  {
    "class":"firrtl.passes.InlineAnnotation",
    "target":"Top.Foo"
  },

Disabling Dedup with --no-dedup works well

module Foo(
  input  [7:0] i,
  output [7:0] o
);
  assign o = i;
endmodule
module Top(
  input  [7:0] i,
  output [7:0] o
);
  wire [7:0] foo_i;
  wire [7:0] foo_o;
  wire [7:0] bar_i;
  wire [7:0] bar_o;
  Foo foo (
    .i(foo_i),
    .o(foo_o)
  );
  assign bar_o = bar_i;
  assign o = foo_o ^ bar_o;
  assign foo_i = i;
  assign bar_i = i;
endmodule

What is the expected behavior?

I would expect only some instances to be inlined.

Steps to Reproduce

Your environment

• Chisel Verions:
• OS:
• Verilator version:

External Information