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chipsalliance / chisel Public

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Support zero-width integer literals.#2932

Merged

jackkoenig merged 10 commits intochipsalliance:masterchipsalliance/chisel:masterfrom

dtzSiFive:feature/zero-width-literalsdtzSiFive/chisel3:feature/zero-width-literalsCopy head branch name to clipboard

Jan 12, 2023

Conversation Commits10 (10)Checks Files changed

Merged

Support zero-width integer literals.#2932
jackkoenig merged 10 commits intochipsalliance:masterfrom
dtzSiFive:feature/zero-width-literals

Commits

Commits on Jan 11, 2023

assert{Inferred,Known}Width: tweak to support width of zero.
dtzSiFive
committed
Bits: nicer error messages for zero-width
dtzSiFive
committed
Support zero-width integer literals.
dtzSiFive
committed
check zero-width to bool conversion
dtzSiFive
committed
onehot test
dtzSiFive
committed
UIntOps: test a few operations.
dtzSiFive
committed
SIntOps: test a few operations
dtzSiFive
committed
{S,U}IntOps: touchup test description, now includes head/tail/pad.
dtzSiFive
committed

Commits on Jan 12, 2023

ChiselSpec: Fix assert{Known,Inferred}Width for zero-width.
dtzSiFive
committed
WidthSpec: update inferred zero-width test
dtzSiFive
committed

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