-
Notifications
You must be signed in to change notification settings - Fork 0
Polystack Mod Specification V3
Polystack is a modular microcontroller system originally designed for multirotor flight control but is now more general. It was originally design by Chickadee Tech LLC but is an open standard that anyone can implement. This document is meant to lay out the minimum technical specification for a Polystack mod. To create a power or control polystack board see their specifications.
A polystack has three parts, from bottom to top, power, control and mods. A power board interfaces with a variety of power sources and provides 5v DC power to the control board above it. The control board holds a microcontroller at minimum and may also have peripherals such as a gyro and accelerometer built in. Its main purpose, however, is to connect as many IO lines to the polystack connector as it can. These IO lines can then connect to up to seven different mod boards that provide a variety of functions to the main microcontroller.
The polystack connector is the spine of the whole stack. It carries informations from all of the different mods to the control board where user written software can do awesome things with it. The connector is an 80 pin, high density connector made by Hirose. The series is called DF40. There are two different connectors involved, the header and the receptacle. There are a variety of receptacles that range in height between 1.5mm and 4mm in 0.5mm increments (2.5mm isn't available). These receptacles mate with a common header that is low profile on its own. Polystack mods always have the header on the bottom of the board and the receptacle on top. This allows the designer of the mod to adjust the overall stack heigh based on the height of the tallest component.
The standard form factor of polystack boards is 36mm by 36mm with four mounting holes for M3 screws 30.5mm apart in both dimensions. The corners are rounded with a 2.75mm radius. This is a common form factor for multirotor flight controllers. A mod may be larger than this size but must warn the buyer that it may not be compatible with other mods. For Chickadee Tech designs and the template design, the connector is always laid out on the right hand side of the board, also known as the back. It is vertically centered between board edges and horizontally is 6.35mm from the board edge. This position is true for both the top Receptacle and the bottom header. We also suggest labeling the receptacle height on the top of the board in silkscreen below the connector.
Within this standard form factor, different regions of the board have different height restrictions. This is done to ensure that polystack mods can be stacked on top of each other with minimal conflicts. There are height restrictions on both the top and bottom of the board so that a design can put parts on both sides.
The inside 24mm x 30mm square of the board aligned to the back of the board always allows for a maximum height above the bottom of the board of 1.5mm. This was chosen to accamodate LQFP packages on the bottom. The result of this is that the top of the board is restricted to the stacking height of the board minus 1.5mm. For example, with a 4mm receptacle, components in the middle must be shorter than 2.5mm.
The remaining outer three sides, the top, left and bottom in the schematic, do not allow any components on the bottom so that connectors and such on the outside may be the full stacking height. For example, to place a USB connector on the top of the board you only actually need a 3mm stacking height because the connector is 2.8mm high.
There is an exception to this rule. The top edge in the schematic has a region for the mod EEPROM. The EEPROM may be moved on the board but the height restrictions must always be followed. This region is in the top right of the board, is 6mm high and 12.5mm wide. The bottom height can be up to 1mm and the top the stacking height minus 1mm.
The DF40 connectors are surface mount, which is great for assembly, but it makes it more complicated to pass signals from one side of the board to the other. To do so, you must use traces and vias to pass through the board. Polystack takes advantage of this, however, to rewire the connections from the bottom to top based on what the mod uses. For example, the connector includes eight spots for UART connections. When a mod connects to one of these UARTs it doesn't pass the wires on but instead shifts the remaining seven spots down. That way, the mod above can also grab a UART from the first position. Only the control board actually knows that the second mod got the second UART. When mods use connections they must take from the front unless absolutely necessary and shift the remaining down. For connections they do not use, they must preserve the connections. This includes the reserved pins on the back of the connector.
Doing this layout of traces and vias in a small space can be tricky. This repository includes a python script that will generate a starter "butterfly" layout that accounts for what connections are used. It includes optional settings for tolerances and defaults to those for OSH Park two layer boards. The layout isn't perfect yet so double check everything and run DRC!
The general layout of the connectors pins is designed for two main things. First, more commonly used connections such as GPIO and UARTS are on the front of the connector for easy access. The back includes reserved pins, MCU controls and ground. Vertically, the pins are laid out so that shifts happen outwards. This way shifts move to an area where there is more space between the vias rather than less.
Despite all of these guidelines, mods are free to lay out the traces and vias however they like as long as the connectors are in the correct spots and the electrical connections are correct.
For details on each pin see [this](Pin Definitions) page. Specifications there must be followed by both mods and control boards.
The last piece of what makes a polystack mod a polystack mod is the EEPROM memory and height pins. Each mod has an EEPROM memory that stores an encoded protocol buffer which includes information about the mod itself. The EEPROMs are all connected on a shared i2c bus and must use the three height pins in its address to differentiate themselves from other mods. The mod is also responsible for incrementing the incoming height bits by 1 and passing them on. The EEPROM receives the bits before they are incremented. They are all powered off of the 3v3_LL pin. The mod template includes an incrementation circuit and 64kb EEPROM by default.
The template also includes a pad to enable writing to the EEPROM which is 7.45mm from the right edge of the board and is 1.25mm from the top edge. This pad is not required but recommended to prevent software from accidentally overwriting the polystack proto. Not having it will break compatibility with the Chickadee Tech generic test jig though.
The EEPROM must include an encoded protocol buffer that includes:
- Manufacturer ID
- Product ID
- Product version
- Submessages for all connections it makes.
This is the bare minimum and it should probably include additional information such as the information URL. See the .proto for all options.
Mods should most likely be powered of the multi-pin 5v rail. Control boards should provide up to a total 1.8A this way to share amongst all mods. Even if it needs 3.3v, it should regulate down from 5v. This was done so that the amp pool is shared between 5v and 3.3v circuitry. The 5v rail is not active when the control board is plugged into USB because it cannot provide 1.8A. As a result, the 3V3_LL rail is used to power the EEPROM so that it may be read when only on USB. This rail may also be used when shifting logic levels from 5v to 3.3v but should not consume more than a few mA.
Mods should try their best to not leak power to the common 5v rail from IO pins but its OK, but annoying, if they do.
There are two additional single power pins, +Batt and 3V3_E. +Batt is actually not a power pin but rather the 1:10 divided voltage of the battery powering the stack, if any. If no battery is present then it should be grounded. The 3v3_E pin is dubbed for "emergency" 3.3v power that isn't used by anything now. It should be passed through untouched.
Chickadee Tech boards include two trademarks that are owned by Chickadee Tech LLC and one that is used by the Open Source Hardware Association. The first is the Chickadee (bird) logo and it should never be used on boards created by anyone other than Chickadee Tech. Its signifies boards create by Chickadee Tech and rogue use of it can damage the company's reputation.
The second mark is the stylized "polystack" logo. This mark is also owned by Chickadee Tech but may be licensed for free from Chickadee Tech LLC by emailing support@chickadee.tech. After reviewing your design we'll provide written permission to use the logo. Do not sell or distribute boards with this logo until you've gotten written permission from Chickadee Tech.
The last logo is the open source hardware gear logo that is used to designate open source hardware that fits the definition laid out by the Open Source Hardware Association. Make sure you meet all of their requirements before using the logo.