-
Notifications
You must be signed in to change notification settings - Fork 0
Pin Definitions
The polystack connector includes 80 different pins. This doc lays out which pins do what. The numbering is a bit weird so pay attention. The left side of the connector is 1 to 40 top to bottom and the right side is 41 to 80 top to bottom.
These four pins carry capture compare channels from the microcontroller that are on their own unique timer. They should also be DMA accessible but its not required. DMA serviced channels should be connected to lower pins so they get used first.
These are general purpose IO pins that should also be external interrupt capable. As before, put EXTI capable pins first.
These two pins are the i2c bus that service both the mod EEPROM and any other i2c devices. Its not meant as a high speed bus.
These three pins are used to encode the height or layer of the mod above the microcontroller. They should be used to form part of the EEPROM i2c address and incremented by 1 by each mod.
This pin is meant to only power the EEPROM, height increment and low amp logic level shifting. Its shared amongst all mods and is available when powered by USB.
This is an experimental pin that isn't used by anything yet. Its meant as a way to power portions of other mods when the main battery is not available such as when a miniquad crashes and ejects its main battery.
This pin carries a 1/10 divided voltage from the main battery. It should not be used to power anything. (It used to be full voltage but Scott fried a full stack of boards with a short from it to 5v.)
These are the main power pins that carry up to 1.8A (300mA each) of 5v DC power. Use these to power 3.3v logic via a regulator.
These are eight pairs of UART TX and RX lines. TX lines are odd numbered and RX lines are even numbered. Most microcontroller don't have eight hardware UARTs but can use bitbanged GPIO in its placed. Those UARTs should be in the highest positions so they are used last. If the UART pins are shared with other serial communications such as SPI they should be put towards the end of their respective sections in the opposite order to reduce the likelihood the are both used.
UART2 (TODO(tannewt): double check this) should also be bootloader capable as a convention. Some boards may require being placed at height 1 so they can take their pick of UARTs.
These are two sets of four capture compare timer channels. Each set of four may share a base timer. Its ok if its actually two timers running the same clock though. A mod that uses them should use all four lines even when using a subset.
These two pins connect to ADC channels on the microcontroller and should be used individually.
Pass through these pins, they are reserved for later.
These pins were originally set aside for SDMMC communication but due to the open nature of the SPI microSD API the microSD card mod uses it instead. So, these pins are unused currently and should be considered reserved for a future revision of the connector. Have an idea for what they should be? Post an issue to the polystack GitHub.
These pins are the return ground for all power and signal. Usually the vias in the template can be tidied up to be more compact.
This pin dictates if the microcontroller should boot into bootloader or the user program. On the Chickadee Tech F3FC and F4FC this is tied to RESET via a delay circuit that causes a long low reset (aka long button press) to boot into the bootloader (BOOT0 high).
This resets the based controller and is active low. Mods should pass it through.
Like pins 51 - 56, these two pins are reserved for later use.
They were pegged for CAN bus communication but are no longer. Mods should pass them through untouched.
This final set of pins is three sets of four SPI pins. Use four pins at once and shift the rest down if needed.