Merge pull request zhelnio#3 from MolVlad/00_simple

porting to piswords

board/piswords/Makefile

@@ -0,0 +1,83 @@
+# schoolRISCV board Makefile
+#
+# Stanislav Zhelnio, 2020
+#
+
+# default target to run when make is called without args
+help:
+	$(info make help   - show this message(default))
+	$(info make all    - clean, create the board project and run the synthesis)
+	$(info make clean  - delete synth folder)
+	$(info make create - create the board project)
+	$(info make open   - open the board project)
+	$(info make build  - build the board project)
+	$(info make load   - program the FPGA board)
+	@true
+
+CABLE_NAME   ?= "USB-Blaster"
+PROJECT_NAME ?= $(notdir $(CURDIR))
+PROJECT_DIR  ?= project
+
+all: create build
+
+# make clean
+#  delete <project_dirname>
+clean:
+	rm -rf $(PROJECT_DIR)
+
+# make create
+#  delete and create <project_dirname>
+create: clean $(PROJECT_DIR)
+
+# make project
+#  - if folder "project" does not exist
+#  - create folder "project"
+#  - copy all the project template files to new folder renaiming its extensions
+$(PROJECT_DIR):
+	mkdir  $(PROJECT_DIR)
+	cp $(PROJECT_NAME).qpf_ $(PROJECT_DIR)/$(PROJECT_NAME).qpf
+	cp $(PROJECT_NAME).qsf_ $(PROJECT_DIR)/$(PROJECT_NAME).qsf
+	cp $(PROJECT_NAME).sdc_ $(PROJECT_DIR)/$(PROJECT_NAME).sdc
+
+QUARTUS     := cd $(PROJECT_DIR) && quartus
+QUARTUS_SH  := cd $(PROJECT_DIR) && quartus_sh
+QUARTUS_PGM := cd $(PROJECT_DIR) && quartus_pgm
+
+# when we run quartus bins from WSL it can be installed on host W10
+# it this case we have to add .exe to the executed binary name
+ifdef WSL_DISTRO_NAME
+ ifeq (, $(shell which $(QUARTUS)))
+  QUARTUS     := $(QUARTUS).exe
+  QUARTUS_SH  := $(QUARTUS_SH).exe
+  QUARTUS_PGM := $(QUARTUS_PGM).exe
+ endif
+endif
+
+# make open
+#  cd project && quartus <projectname> &
+#     cd project            - go to project folder 
+#	  &&                    - if previous command was successfull
+#     quartus <projectname> - open <projectname> in quartus 
+#     &                     - run previous command in shell background
+open: $(PROJECT_DIR)
+	$(QUARTUS) $(PROJECT_NAME) &
+
+# make build
+#  cd project && quartus_sh --flow compile <projectname>
+#     cd project                              - go to project folder 
+#     &&                                      - if previous command was successfull
+#     quartus_sh --flow compile <projectname> - run quartus shell & perform basic compilation 
+#                                               of <projectname> project
+build: $(PROJECT_DIR)
+	$(QUARTUS_SH) --flow compile $(PROJECT_NAME)
+
+# make load
+#  cd project && quartus_pgm -c "USB-Blaster" -m JTAG -o "p;<projectname>.sof"
+#     cd project               - go to project folder 
+#	  &&                       - if previous command was successfull
+#     quartus_pgm              - launch quartus programmer
+#     -c "USB-Blaster"         - connect to "USB-Blaster" cable
+#     -m JTAG                  - in JTAG programming mode
+#     -o "p;<projectname>.sof" - program (configure) FPGA with <projectname>.sof file
+load:
+	$(QUARTUS_PGM) -c $(CABLE_NAME) -m JTAG -o "p;$(PROJECT_NAME).sof"

board/piswords/piswords.qpf

@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2018  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel FPGA IP License Agreement, or other applicable license
+# agreement, including, without limitation, that your use is for
+# the sole purpose of programming logic devices manufactured by
+# Intel and sold by Intel or its authorized distributors.  Please
+# refer to the applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
+# Date created = 21:23:28  Сентябрь 06, 2021
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "18.1"
+DATE = "21:23:28  Сентябрь 06, 2021"
+
+# Revisions
+
+PROJECT_REVISION = "piswords"

board/piswords/piswords.qsf

@@ -0,0 +1,81 @@
+
+set_global_assignment -name FAMILY "Cyclone IV E"
+
+set_global_assignment -name DEVICE EP4CE6E22C8
+
+set_global_assignment -name NUM_PARALLEL_PROCESSORS 4
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY .
+
+set_global_assignment  -name TOP_LEVEL_ENTITY piswords
+
+set_global_assignment -name SDC_FILE ./piswords.sdc
+
+set_global_assignment -name VERILOG_FILE ../piswords.v
+
+set_global_assignment -name VERILOG_FILE ../../../src/sr_cpu.v
+set_global_assignment -name VERILOG_FILE ../../../src/sm_hex_display.v
+set_global_assignment -name VERILOG_FILE ../../../src/sm_register.v
+set_global_assignment -name VERILOG_FILE ../../../src/sm_rom.v
+set_global_assignment -name VERILOG_FILE ../../../src/sm_top.v
+
+set_global_assignment -name SEARCH_PATH ..
+set_global_assignment -name SEARCH_PATH ../../program
+set_global_assignment -name SEARCH_PATH ../../../src
+
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to *
+
+set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED"
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+
+set_location_assignment PIN_23 -to clk
+set_location_assignment PIN_25 -to reset_n
+
+set_location_assignment PIN_31 -to key_sw[0]
+set_location_assignment PIN_32 -to key_sw[1]
+set_location_assignment PIN_33 -to key_sw[2]
+set_location_assignment PIN_34 -to key_sw[3]
+
+set_location_assignment PIN_38 -to led[0]
+set_location_assignment PIN_39 -to led[1]
+set_location_assignment PIN_42 -to led[2]
+set_location_assignment PIN_43 -to led[3]
+
+set_location_assignment PIN_44 -to led2[0]
+set_location_assignment PIN_46 -to led2[1]
+set_location_assignment PIN_49 -to led2[2]
+set_location_assignment PIN_50 -to led2[3]
+
+set_location_assignment PIN_80 -to hex[7]
+set_location_assignment PIN_72 -to hex[6]
+set_location_assignment PIN_71 -to hex[5]
+set_location_assignment PIN_70 -to hex[4]
+set_location_assignment PIN_101 -to hex[3]
+set_location_assignment PIN_100 -to hex[2]
+set_location_assignment PIN_99 -to hex[1]
+set_location_assignment PIN_98 -to hex[0]
+
+set_location_assignment PIN_120 -to digit[0]
+set_location_assignment PIN_119 -to digit[1]
+set_location_assignment PIN_115 -to digit[2]
+set_location_assignment PIN_114 -to digit[3]
+
+set_location_assignment PIN_86 -to digit2[0]
+set_location_assignment PIN_85 -to digit2[1]
+set_location_assignment PIN_84 -to digit2[2]
+set_location_assignment PIN_83 -to digit2[3]
+
+set_location_assignment PIN_101 -to hsync
+set_location_assignment PIN_103 -to vsync
+
+set_location_assignment PIN_104 -to rgb[0]
+set_location_assignment PIN_105 -to rgb[1]
+set_location_assignment PIN_106 -to rgb[2]
+
+set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+
+
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

board/piswords/piswords.sdc

@@ -0,0 +1,12 @@
+create_clock -period "50.0 MHz" [get_ports clk_50]
+
+derive_clock_uncertainty
+create_generated_clock -name {clk}     -divide_by 2 -source [get_ports {clk_50}] [get_registers {sm_top:sm_top|sm_clk_divider:sm_clk_divider|sm_register_we:r_cntr|q[*]}]
+create_generated_clock -name {clk_hex} -divide_by 2 -source [get_ports {clk_50}] [get_registers {sm_clk_divider:hex_clk_divider|sm_register_we:r_cntr|q[16]}]
+
+set_false_path -from [get_ports {key_sw[*]}] -to [all_clocks]
+
+set_false_path -from * -to [get_ports {led[*]}]
+set_false_path -from * -to [get_ports {digit[*]}]
+set_false_path -from * -to [get_ports {hex[*]}]
+set_false_path -from * -to buzzer

board/piswords/piswords.v

@@ -0,0 +1,70 @@
+
+/*
+ * Copyright(c) 2020 Petr Krasnoshchekov
+ *                   Black_Storm
+ */
+
+module piswords
+(
+    input         clk,
+    input         reset_n,
+    input  [ 3:0] key_sw,
+    output [ 3:0] led,
+    output [ 7:0] hex,
+    output [ 3:0] digit,
+    output        buzzer
+);
+    // wires & inputs
+    wire          clkCpu;
+    wire          clkIn     =  clk;
+    wire          rst_n     =  key_sw[0]; //  s4
+    wire          clkEnable =  key_sw[1]; //  s3
+    wire [  3:0 ] clkDevide =  4'b1000;
+    wire [  4:0 ] regAddr   =  key_sw[2] ? 5'h0 : 5'ha; //  s2
+    wire [ 31:0 ] regData;
+
+    //cores
+    sm_top sm_top
+    (
+        .clkIn      ( clkIn     ),
+        .rst_n      ( rst_n     ),
+        .clkDevide  ( clkDevide ),
+        .clkEnable  ( clkEnable ),
+        .clk        ( clkCpu    ),
+        .regAddr    ( regAddr   ),
+        .regData    ( regData   )
+    );
+
+    //outputs
+    assign led[0]    = ~clkCpu;
+    assign led[3:1] = ~regData[2:0];
+
+    //hex out
+    wire [ 31:0 ] h7segment = regData;
+    wire clkHex;
+
+    sm_clk_divider hex_clk_divider
+    (
+        .clkIn   ( clkIn  ),
+        .rst_n   ( rst_n  ),
+        .devide  ( 4'b0   ),
+        .enable  ( 1'b1   ),
+        .clkOut  ( clkHex )
+    );
+
+    wire [ 7:0] anodes;
+    assign digit = anodes [ 3:0];
+
+    sm_hex_display_8 sm_hex_display_8
+    (
+        .clock          ( clkHex     ),
+        .resetn         ( rst_n      ),
+        .number         ( h7segment  ),
+        .seven_segments ( hex[6:0]   ),
+        .dot            ( hex[7]     ),
+        .anodes         ( anodes     )
+    );
+
+    assign buzzer = 1'b1;
+
+endmodule

board/rzrd/Makefile

@@ -0,0 +1,83 @@
+# schoolRISCV board Makefile
+#
+# Stanislav Zhelnio, 2020
+#
+
+# default target to run when make is called without args
+help:
+	$(info make help   - show this message(default))
+	$(info make all    - clean, create the board project and run the synthesis)
+	$(info make clean  - delete synth folder)
+	$(info make create - create the board project)
+	$(info make open   - open the board project)
+	$(info make build  - build the board project)
+	$(info make load   - program the FPGA board)
+	@true
+
+CABLE_NAME   ?= "USB-Blaster"
+PROJECT_NAME ?= $(notdir $(CURDIR))
+PROJECT_DIR  ?= project
+
+all: create build
+
+# make clean
+#  delete <project_dirname>
+clean:
+	rm -rf $(PROJECT_DIR)
+
+# make create
+#  delete and create <project_dirname>
+create: clean $(PROJECT_DIR)
+
+# make project
+#  - if folder "project" does not exist
+#  - create folder "project"
+#  - copy all the project template files to new folder renaiming its extensions
+$(PROJECT_DIR):
+	mkdir  $(PROJECT_DIR)
+	cp $(PROJECT_NAME).qpf_ $(PROJECT_DIR)/$(PROJECT_NAME).qpf
+	cp $(PROJECT_NAME).qsf_ $(PROJECT_DIR)/$(PROJECT_NAME).qsf
+	cp $(PROJECT_NAME).sdc_ $(PROJECT_DIR)/$(PROJECT_NAME).sdc
+
+QUARTUS     := cd $(PROJECT_DIR) && quartus
+QUARTUS_SH  := cd $(PROJECT_DIR) && quartus_sh
+QUARTUS_PGM := cd $(PROJECT_DIR) && quartus_pgm
+
+# when we run quartus bins from WSL it can be installed on host W10
+# it this case we have to add .exe to the executed binary name
+ifdef WSL_DISTRO_NAME
+ ifeq (, $(shell which $(QUARTUS)))
+  QUARTUS     := $(QUARTUS).exe
+  QUARTUS_SH  := $(QUARTUS_SH).exe
+  QUARTUS_PGM := $(QUARTUS_PGM).exe
+ endif
+endif
+
+# make open
+#  cd project && quartus <projectname> &
+#     cd project            - go to project folder 
+#	  &&                    - if previous command was successfull
+#     quartus <projectname> - open <projectname> in quartus 
+#     &                     - run previous command in shell background
+open: $(PROJECT_DIR)
+	$(QUARTUS) $(PROJECT_NAME) &
+
+# make build
+#  cd project && quartus_sh --flow compile <projectname>
+#     cd project                              - go to project folder 
+#     &&                                      - if previous command was successfull
+#     quartus_sh --flow compile <projectname> - run quartus shell & perform basic compilation 
+#                                               of <projectname> project
+build: $(PROJECT_DIR)
+	$(QUARTUS_SH) --flow compile $(PROJECT_NAME)
+
+# make load
+#  cd project && quartus_pgm -c "USB-Blaster" -m JTAG -o "p;<projectname>.sof"
+#     cd project               - go to project folder 
+#	  &&                       - if previous command was successfull
+#     quartus_pgm              - launch quartus programmer
+#     -c "USB-Blaster"         - connect to "USB-Blaster" cable
+#     -m JTAG                  - in JTAG programming mode
+#     -o "p;<projectname>.sof" - program (configure) FPGA with <projectname>.sof file
+load:
+	$(QUARTUS_PGM) -c $(CABLE_NAME) -m JTAG -o "p;$(PROJECT_NAME).sof"

board/rzrd/rzrd.qpf

@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2018  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel FPGA IP License Agreement, or other applicable license
+# agreement, including, without limitation, that your use is for
+# the sole purpose of programming logic devices manufactured by
+# Intel and sold by Intel or its authorized distributors.  Please
+# refer to the applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
+# Date created = 21:23:28  Сентябрь 06, 2021
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "18.1"
+DATE = "21:23:28  Сентябрь 06, 2021"
+
+# Revisions
+
+PROJECT_REVISION = "rzrd"