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[W1] BOOT directly shorts QSPI chip-select to ground #9

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@skot

Review finding W1, recorded 2026-10-14 for bonanzaDisplay v3. Original classification: Warning — hardware reliability.

Location: SW2; U1 pin 60

Current status: Schematic and PCB fix reviewed and committed locally in 72f574b31f454c2da597cdfbb2de53fac2dd011d (not yet pushed). DRC and schematic parity pass. Hardware BOOTSEL/flash verification remains pending.

Original observation: SW2 connects QSPI_SS directly to ground. No series resistor is fitted.

Why it matters: Pressing BOOT while flash traffic is active can force an actively driven chip-select low. Raspberry Pi includes a 1 kΩ resistor so the output can safely override the button pulldown. RP2354's integrated flash does not remove the external BOOTSEL connection.

Recommended action: Add a series resistor following the RP2354 reference circuit and verify reliable BOOTSEL entry. An operating procedure that only presses BOOT while reset is held is less robust than protecting the accessible button.

Completion criteria:

  • Add/implement a suitable series resistor in the BOOTSEL switch path using the RP2354 reference circuit.
  • Synchronize PCB and verify DRC and schematic parity.
  • Record the commit containing the fix.
  • Verify normal flash traffic and reliable BOOTSEL entry on hardware.

Evidence: Raspberry Pi hardware guide, Flash Memory

Activity

  1. added
    v3-pre-PCBAbonanzaDisplay v3 pre-PCBA review findings and follow-up
    on Oct 14, 2026
  2. skot commented on Oct 14, 2026

    @skot
    ContributorAuthor

    Implemented in the main v3.1 schematic and PCB working files:

    • Added R40, 1 kΩ ±1%, 0402, UNI-ROYAL 0402WGF1001TCE / LCSC C11702, with consistent manufacturer, MPN, PARTNO and supplier fields.
    • Connection is U1 pin 60 (QSPI_SS) → R40 pin 1 → R40 pin 2 → SW2 pin 1; SW2 pin 2 remains grounded.
    • Placed R40 on B.Cu beside U1 at (145.75, 61.93) mm. Split the existing BOOT route and moved its nearby via to connect the button side. The MCU-to-resistor trace is approximately 1.21 mm long.
    • Preserved all 68 existing component placements, existing pad geometry, and unrelated routed segments/nets. Refilled copper zones and visually inspected the schematic and local PCB layout.

    Validation: PCB DRC = 0 violations; unconnected items = 0; schematic/PCB parity = 0 mismatches under the current project rules. ERC remains at the existing 19 findings (tracked separately by #15).

    Saved locally in the main project, not yet committed, so there is no new commit ID to cite. Leaving this issue open until the change is committed and normal flash operation / BOOTSEL entry are verified on hardware. Final assembly outputs must include R40.

  3. skot commented on Oct 14, 2026

    @skot
    ContributorAuthor

    Manual review approved; the final adjustment moves the BOOT via onto R40 pad 2 (146.26, 61.93 mm), shortening the route. R40 remains at (145.75, 61.93 mm) on B.Cu. Refreshed the stale zone fills after the via move.

    Committed locally as 72f574b31f454c2da597cdfbb2de53fac2dd011d (not pushed), including the reviewed v3.1 PCB synchronization and metadata corrections.

    Checks on the final saved files: 0 DRC violations, 0 unconnected items, 0 schematic/PCB parity mismatches, 0 shorted schematic nets. All 19 existing ERC findings match the prior baseline exactly. The two BOOT nets remain U1.60–R40.1 and R40.2–SW2.1.

    Leaving this issue open for hardware flash-operation/BOOTSEL testing. R40's via-in-pad now joins the assembly-process review in #12.

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