dt-bindings: soc: adi: Add SC5XX SoC component bindings

Documentation/devicetree/bindings/soc/adi/adi,pads-system-config.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/adi/adi,pads-system-config.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices PADS-related system config for SC5XX processor family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description:
+  Allows other drivers to control the PADS-related system config register.
+  This register ties into many drivers and adds silicon controls for items
+  like voltage selection and endian selection.
+
+properties:
+  compatible:
+    enum:
+      - adi,pads-system-config
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    bus {
+      compatible = "simple-bus";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges;
+
+      pads_system_config: adi-control@31004600 {
+        compatible = "adi,pads-system-config";
+        reg = <0x31004600 0x100>;
+      };
+    };
+
+    emac0: ethernet@31040000 {
+      reg = <0x31040000 0x2000>;
+      adi,system-config = <&pads_system_config>;
+    };

Documentation/devicetree/bindings/soc/adi/adi,reset-controller.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/adi/adi,reset-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices Reset Controller for SC5XX processor family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description:
+  SHARC and ARM core reset control unit for starting/stopping/resetting
+  processors
+
+properties:
+  compatible:
+    enum:
+      - adi,reset-controller
+
+  reg:
+    maxItems: 1
+
+  adi,sharc-min:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Minimum valid SHARC core ID/count
+    minimum: 0
+
+  adi,sharc-max:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Maximum valid SHARC core ID/count
+    maximum: 2
+
+required:
+  - compatible
+  - reg
+  - adi,sharc-min
+  - adi,sharc-max
+
+additionalProperties: false
+
+examples:
+  - |
+    rcu: rcu@3108c000 {
+      compatible = "adi,reset-controller";
+      reg = <0x3108c000 0x1000>;
+      adi,sharc-min = <1>;
+      adi,sharc-max = <2>;
+    };

Documentation/devicetree/bindings/soc/adi/adi,rpmsg-SC598.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/adi/adi,rpmsg-SC598.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices RPMSG Driver for SC5XX processor family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: |
+  Describes device tree binding for adi rpmsg driver
+  required when rpmsg communication is needed and remote core isn't
+  started by adi,remoteproc.
+  The size of vdev-vring specifies how many message buffers are allocated
+  for tx and rx (combined) overriding the default number specified in
+  MAX_RPMSG_NUM_BUFS. The memory-region size must match (or be larger) selected
+  number of messages times MAX_RPMSG_BUF_SIZE (default 512).
+  E.g. for 1024 message buffers (512 for rx and 512 for tx):
+    vdev-vring size = 0x0000a000
+    memory-region size = 0x00080000
+
+  Selection table for MAX_RPMSG_BUF_SIZE=512 (default):
+
+  rpmsg   |            |
+  buffers | vdev-vring | memory-region
+  ---------------------------------
+      256 | 0x00004000 | 0x00020000
+      512 | 0x00006000 | 0x00040000
+     1024 | 0x0000a000 | 0x00080000
+     2048 | 0x00010000 | 0x00100000
+     4096 | 0x0001e000 | 0x00200000
+     8192 | 0x00038000 | 0x00400000
+    16384 | 0x0006c000 | 0x00800000
+    32768 | 0x000d4000 | 0x01000000
+    65536 | 0x001a4000 | 0x02000000
+   131072 | 0x00344000 | 0x04000000
+   262144 | 0x00684000 | 0x08000000
+   524288 | 0x00d04000 | 0x10000000
+  1048576 | 0x01a04000 | 0x20000000
+  2097152 | 0x03404000 | 0x40000000
+
+properties:
+  compatible:
+    enum:
+      - adi,rpmsg-SC598
+
+  reg:
+    maxItems: 1
+
+  core-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: SHARC core number
+
+  adi,rcu:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to Remote Control Unit
+
+  adi,rsc-table:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to resource table memory region shared with SHARC core
+
+  adi,tru:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to Trigger Routing Unit for ICC interrupts
+
+  interrupts:
+    maxItems: 1
+    description: ICC interrupt for rpmsg communication
+
+  adi,tru-master-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: ICC interrupt number to notify remote core
+
+  vdev-vring:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: |
+      phandle to reserved memory region for rpmsg vdev0vrings,
+      if not specified allocates buffer from DMA pool.
+
+  memory-region:
+    maxItems: 1
+    description: |
+      phandle to reserved memory for rpmsg message buffers,
+      if not specified allocates buffer from DMA pool.
+
+
+required:
+  - compatible
+  - core-id
+  - adi,rcu
+  - adi,rsc-table
+  - adi,tru
+  - interrupts
+  - adi,tru-master-id
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    reserved-memory {
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges;
+
+      vdev0vrings: vdev0vring0@20080000 {
+        reg = <0x20080000 0x4000>;
+        no-map;
+      };
+
+      vdev0buffer: vdev0buffer@20084000 {
+        compatible = "shared-dma-pool";
+        reg = <0x20084000 0x20000>;
+        no-map;
+      };
+    };
+
+    rcu: rcu@3108c000 {
+      compatible = "adi,reset-controller";
+      reg = <0x3108c000 0x1000>;
+      adi,sharc-min = <1>;
+      adi,sharc-max = <2>;
+    };
+
+    tru: tru@3108a000 {
+      compatible = "adi,trigger-routing-unit";
+      reg = <0x3108a000 0x1000>;
+      adi,max-master-id = <182>;
+      adi,max-slave-id = <187>;
+    };
+
+    rsc_tbl0: rsc-tbl@20081000 {
+      reg = <0x20081000 0x1000>;
+    };
+
+    core0-rpmsg@28240000 {
+      compatible = "adi,rpmsg-SC598";
+      reg = <0x28240000 0x1000>;
+      core-id = <1>;
+      adi,rcu = <&rcu>;
+      adi,rsc-table = <&rsc_tbl0>;
+      interrupts = <GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
+      adi,tru = <&tru>;
+      adi,tru-master-id = <135>;
+      vdev-vring = <&vdev0vrings>;
+      memory-region = <&vdev0buffer>;
+    };

Documentation/devicetree/bindings/soc/adi/adi,system-event-controller.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/adi/adi,system-event-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices System Event Controller for SC5XX processor family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description:
+  This is the interrupt controller for the SHARC cores on the SC5XX family.
+
+properties:
+  compatible:
+    enum:
+      - adi,system-event-controller
+
+  reg:
+    maxItems: 1
+
+  adi,rcu:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: Associated reset control unit
+
+  adi,sharc-cores:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Number of SHARC cores available
+
+required:
+  - compatible
+  - reg
+  - adi,rcu
+  - adi,sharc-cores
+
+additionalProperties: false
+
+examples:
+  - |
+    sec: sec@31089000 {
+      compatible = "adi,system-event-controller";
+      reg = <0x31089000 0x1000>;
+      adi,rcu = <&rcu>;
+      adi,sharc-cores = <2>;
+    };

Documentation/devicetree/bindings/soc/adi/adi,trigger-routing-unit.yaml

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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/adi/adi,trigger-routing-unit.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices Trigger Routing Unit for SC5XX processor family
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description:
+  Used for ICC between SHARC and ARM cores.
+
+  The TRU provides system-level sequence control without core intervention.
+  The TRU maps trigger masters (generators of triggers) to trigger slaves
+  (receivers of triggers). Slave endpoints can be configured to respond to
+  triggers in various ways. Multiple TRUs may be provided in a
+  multiprocessor system to create a trigger network. Common applications
+  enabled by the TRU include
+
+properties:
+  compatible:
+    enum:
+      - adi,trigger-routing-unit
+
+  reg:
+    maxItems: 1
+
+  adi,max-master-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Max Trigger Master ID
+    maximum: 1024
+
+  adi,max-slave-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Max Trigger Slave ID
+    maximum: 1024
+
+patternProperties:
+  "^channel-[0-9]+$":
+    description: Trigger Routing Channel to Map Master/Slave
+    type: object
+    properties:
+      adi,tru-master-id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description: Trigger Routing Master ID
+      adi,tru-slave-id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description: Trigger Routing Slave ID
+    required:
+      - adi,tru-master-id
+      - adi,tru-slave-id
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - adi,max-master-id
+  - adi,max-slave-id
+
+additionalProperties: false
+
+examples:
+  - |
+    tru: tru@3108a000 {
+      compatible = "adi,trigger-routing-unit";
+      reg = <0x3108a000 0x1000>;
+      adi,max-master-id = <182>;
+      adi,max-slave-id = <187>;
+
+      rpmsg_to_a55: channel-0 {
+        adi,tru-master-id = <134>; /* trigger master SOFT3 */
+        adi,tru-slave-id = <160>; /* TRU0_IRQ3 */
+      };
+      rpmsg_to_sharc0: channel-1 {
+        adi,tru-master-id = <135>; /* trigger master SOFT4 */
+        adi,tru-slave-id = <164>; /* TRU0_IRQ7 */
+      };
+      rpmsg_to_sharc1: channel-2 {
+        adi,tru-master-id = <136>; /* trigger master SOFT5 */
+        adi,tru-slave-id = <168>; /* TRU0_IRQ11 */
+      };
+    };