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Remove register_number from Tlp object; use address field instead
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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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alexforencich committed Nov 27, 2023
1 parent 1d05540 commit 8e01027
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Showing 4 changed files with 11 additions and 21 deletions.
8 changes: 4 additions & 4 deletions cocotbext/pcie/core/function.py
Original file line number Diff line number Diff line change
Expand Up @@ -546,15 +546,15 @@ async def perform_nonposted_operation(self, req, timeout=0, timeout_unit='ns'):

async def handle_config_0_read_tlp(self, tlp):
if tlp.dest_id.device == self.device_num and tlp.dest_id.function == self.function_num:
self.log.info("Config type 0 read, reg 0x%03x", tlp.register_number)
self.log.info("Config type 0 read, reg 0x%03x", tlp.address >> 2)

# capture address information
if self.bus_num != tlp.dest_id.bus:
self.log.info("Capture bus number %d", tlp.dest_id.bus)
self.pcie_id = self.pcie_id._replace(bus=tlp.dest_id.bus)

# perform operation
data = await self.read_config_register(tlp.register_number)
data = await self.read_config_register(tlp.address >> 2)

# prepare completion TLP
cpl = Tlp.create_completion_data_for_tlp(tlp, self.pcie_id)
Expand All @@ -574,7 +574,7 @@ async def handle_config_0_read_tlp(self, tlp):
async def handle_config_0_write_tlp(self, tlp):
if tlp.dest_id.device == self.device_num and tlp.dest_id.function == self.function_num:
self.log.info("Config type 0 write, reg 0x%03x data 0x%08x",
tlp.register_number, struct.unpack('<L', tlp.get_data())[0])
tlp.address >> 2, struct.unpack('<L', tlp.get_data())[0])

# capture address information
if self.bus_num != tlp.dest_id.bus:
Expand All @@ -584,7 +584,7 @@ async def handle_config_0_write_tlp(self, tlp):
data, = struct.unpack('<L', tlp.get_data())

# perform operation
await self.write_config_register(tlp.register_number, data, tlp.first_be)
await self.write_config_register(tlp.address >> 2, data, tlp.first_be)

# prepare completion TLP
cpl = Tlp.create_completion_for_tlp(tlp, self.pcie_id)
Expand Down
6 changes: 1 addition & 5 deletions cocotbext/pcie/core/rc.py
Original file line number Diff line number Diff line change
Expand Up @@ -576,14 +576,12 @@ async def config_read(self, dev, addr, length, timeout=0, timeout_unit='ns'):
byte_length = min(length-n, 4-first_pad)
req.set_addr_be(addr, byte_length)

req.register_number = addr >> 2

cpl_list = await self.perform_nonposted_operation(req, timeout, timeout_unit)

if not cpl_list:
# timed out
d = b'\xff\xff\xff\xff'
elif cpl_list[0].status == CplStatus.CRS and req.register_number == 0 and cpl_list[0].ingress_port:
elif cpl_list[0].status == CplStatus.CRS and req.address == 0 and cpl_list[0].ingress_port:
# completion retry status
if cpl_list[0].ingress_port.pcie_cap.crs_software_visibility_enable:
d = b'\x01\x00\xff\xff'
Expand Down Expand Up @@ -642,8 +640,6 @@ async def config_write(self, dev, addr, data, timeout=0, timeout_unit='ns'):
byte_length = min(len(data)-n, 4-first_pad)
req.set_addr_be_data(addr, data[n:n+byte_length])

req.register_number = addr >> 2

cpl_list = await self.perform_nonposted_operation(req, timeout, timeout_unit)

n += byte_length
Expand Down
8 changes: 2 additions & 6 deletions cocotbext/pcie/core/tlp.py
Original file line number Diff line number Diff line change
Expand Up @@ -209,7 +209,6 @@ def __init__(self, tlp=None):
self.lower_address = 0
self.address = 0
self.ph = 0
self.register_number = 0
self.data = bytearray()
self.seq = 0

Expand Down Expand Up @@ -238,7 +237,6 @@ def __init__(self, tlp=None):
self.lower_address = tlp.lower_address
self.address = tlp.address
self.ph = tlp.ph
self.register_number = tlp.register_number
self.data = bytearray(tlp.data)
self.seq = tlp.seq

Expand Down Expand Up @@ -506,7 +504,7 @@ def pack_header(self):
pkt.extend(struct.pack('>L', dw))

if self.fmt_type in {TlpType.CFG_READ_0, TlpType.CFG_WRITE_0, TlpType.CFG_READ_1, TlpType.CFG_WRITE_1}:
dw = (self.register_number & 0x3ff) << 2
dw = self.address & 0xffc
dw |= int(self.dest_id) << 16
pkt.extend(struct.pack('>L', dw))
else:
Expand Down Expand Up @@ -578,7 +576,7 @@ def unpack_header(cls, pkt):

if tlp.fmt_type in {TlpType.CFG_READ_0, TlpType.CFG_WRITE_0, TlpType.CFG_READ_1, TlpType.CFG_WRITE_1}:
dw, = struct.unpack_from('>L', pkt, 8)
tlp.register_number = (dw >> 2) & 0x3ff
tlp.address = dw & 0xffc
tlp.dest_id = PcieId.from_int(dw >> 16)
elif tlp.fmt in {TlpFmt.FOUR_DW, TlpFmt.FOUR_DW_DATA}:
val, = struct.unpack_from('>Q', pkt, 8)
Expand Down Expand Up @@ -640,7 +638,6 @@ def __eq__(self, other):
self.lower_address == other.lower_address and
self.address == other.address and
self.ph == other.ph and
self.register_number == other.register_number and
self.seq == other.seq
)
return False
Expand Down Expand Up @@ -669,7 +666,6 @@ def __repr__(self):
f"lower_address={self.lower_address:#x}, "
f"address={self.address:#x}, "
f"ph={self.ph}, "
f"register_number={self.register_number:#x}, "
f"seq={self.seq})"
)

Expand Down
10 changes: 4 additions & 6 deletions cocotbext/pcie/xilinx/us/tlp.py
Original file line number Diff line number Diff line change
Expand Up @@ -309,7 +309,7 @@ def pack_us_rq(self):
# Completer Request descriptor
if self.fmt_type in {TlpType.CFG_READ_0, TlpType.CFG_WRITE_0, TlpType.CFG_READ_1, TlpType.CFG_WRITE_1}:
# configuration
dw = (self.register_number & 0x3ff) << 2
dw = self.address & 0xffc
pkt.data.append(dw)
pkt.data.append(0)
else:
Expand Down Expand Up @@ -377,7 +377,7 @@ def unpack_us_rq(cls, pkt, check_parity=False):
tlp.fmt = TlpFmt.FOUR_DW_DATA
else:
# configuration
tlp.register_number = (pkt.data[0] >> 2) & 0x3ff
tlp.address = pkt.data[0] & 0xffc
tlp.completer_id = PcieId.from_int(pkt.data[3] >> 8)
tlp.requester_id_enable = bool(pkt.data[3] & (1 << 24))

Expand Down Expand Up @@ -538,8 +538,7 @@ def __eq__(self, other):
self.last_be == other.last_be and
self.lower_address == other.lower_address and
self.address == other.address and
self.ph == other.ph and
self.register_number == other.register_number
self.ph == other.ph
)
return False

Expand All @@ -566,6 +565,5 @@ def __repr__(self):
f"last_be={self.last_be:#x}, "
f"lower_address={self.lower_address:#x}, "
f"address={self.address:#x}, "
f"ph={self.ph}, "
f"register_number={self.register_number:#x})"
f"ph={self.ph})"
)

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