Fix clock output enable bit. Fix register control input pull value.#32
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EdNutting merged 1 commit intoTeachingTechnologistBeth:masterfrom Oct 29, 2018
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The output enable bit of the clock was X instead of 1.
The pull value of the registers in real life is 0101 so that they are enabled without a clock input.
Also, simplified the code for the clock output phase bits.