Smallfix for generated clock

[stanminlee]

Small bug where strings get corrupted due to stringPrintTmp. May interfere with generated clock lookup. Fixed by making a copy of the string instead of using a temporary buffer.

Added more verbosity since it is an additional feature for debug help

---

Important

Fix string corruption in generated clock lookup and add verbose debug logging.

• Bug Fix:
  • Replace stringPrintTmp with stringCopy(stringPrintTmp(...)) in createLibertyGeneratedClocks() in Sdc.cc and makeGeneratedClocks() in VerilogReader.cc to prevent string corruption.
• Debugging:
  • Add debug prints in createLibertyGeneratedClocks() in Sdc.cc to log found generated clock pins and creation of generated clocks.
  • Add debug prints in makeGeneratedClocks() in VerilogReader.cc to log addition of generated clock pins to liberty cells.

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[greptile-apps]

Greptile Overview

Greptile Summary

Fixes a critical string corruption bug in generated clock processing by ensuring stringPrintTmp results are copied before use, and adds verbose logging for debugging.

• Fixed string corruption in createLibertyGeneratedClocks() by wrapping stringPrintTmp with stringCopy for generatedClockName
• Fixed string corruption in makeGeneratedClocks() by wrapping stringPrintTmp with stringCopy for pinPath
• Added debug logging to report found pins, created clocks, and added clock pins
• Added guard condition to skip createLibertyGeneratedClocks when no generated clock pins exist

Confidence Score: 4/5

• Safe to merge with correct bug fix and appropriate logging additions
• The string corruption fix correctly addresses the issue where stringPrintTmp temporary buffers could be overwritten. The logging is intentional for debug purposes. No breaking changes or risky modifications.
• No files require special attention

Important Files Changed

Filename	Overview
sdc/Sdc.cc	Fixed string corruption bug by copying stringPrintTmp result and added debug logging
verilog/VerilogReader.cc	Fixed string corruption bug by copying stringPrintTmp result and added debug logging

Sequence Diagram

sequenceDiagram
    participant Sdc
    participant Network
    participant VerilogReader
    participant Clock
    participant stringPrintTmp as stringPrintTmp Buffer
    participant stringCopy as stringCopy

    Note over VerilogReader: makeGeneratedClocks()
    VerilogReader->>stringPrintTmp: Format pin path
    stringPrintTmp-->>VerilogReader: Temporary buffer
    VerilogReader->>stringCopy: Copy temp buffer
    stringCopy-->>VerilogReader: Persistent copy
    VerilogReader->>Network: addGeneratedClockPinToCell(pinPath, cell)
    VerilogReader->>VerilogReader: reportLine (logging)

    Note over Sdc: makeClock()
    Sdc->>Sdc: Check generatedClockPinsToCellMap size
    alt Map not empty
        Sdc->>Sdc: createLibertyGeneratedClocks(clk)
        
        Note over Sdc: createLibertyGeneratedClocks()
        Sdc->>Network: Get generatedClockPinsToCellMap
        Network-->>Sdc: Map of pins to cells
        
        loop For each pin in map
            Sdc->>Network: findPin(pinName)
            Network-->>Sdc: Pin object
            
            alt Pin in clock network
                Sdc->>Sdc: reportLine "Found pin..." (logging)
                
                loop For each generated clock
                    Sdc->>stringPrintTmp: Format generated clock name
                    stringPrintTmp-->>Sdc: Temporary buffer
                    Sdc->>stringCopy: Copy temp buffer
                    stringCopy-->>Sdc: Persistent copy (generatedClockName)
                    Sdc->>Sdc: reportLine "Creating generated clock..." (logging)
                    Sdc->>Sdc: makeGeneratedClock(generatedClockName, ...)
                    Sdc->>Clock: new Clock(generatedClockName, ...)
                    Clock->>stringCopy: Copy name internally
                    stringCopy-->>Clock: Owned copy
                end
            end
        end
    end

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