Add ATmega32U2, ATmega16U2, ATmega3208, and ATmega3209

Cargo.toml

@@ -29,6 +29,7 @@ atmega1284p = ["device-selected"]
 atmega128a = ["device-selected"]
 atmega128rfa1 = ["device-selected"]
 atmega16 = ["device-selected"]
+atmega16u2 = ["device-selected"]
 atmega164pa = ["device-selected"]
 atmega168 = ["device-selected"]
 atmega2560 = ["device-selected"]
@@ -37,10 +38,13 @@ atmega8u2 = ["device-selected"]
 atmega324pa = ["device-selected"]
 atmega328p = ["device-selected"]
 atmega328pb = ["device-selected"]
+atmega3208 = ["device-selected"]
+atmega3209 = ["device-selected"]
 atmega4808 = ["device-selected"]
 atmega4809 = ["device-selected"]
 atmega48p = ["device-selected"]
 atmega32a = ["device-selected"]
+atmega32u2 = ["device-selected"]
 atmega32u4 = ["device-selected"]
 atmega64 = ["device-selected"]
 atmega644 = ["device-selected"]

Makefile

@@ -1,6 +1,6 @@
 all: deps chips
 
-CHIPS := at90usb1286 atmega1280 atmega1284p atmega128a atmega128rfa1 atmega16 atmega164pa atmega168 atmega2560 atmega8 atmega8u2 atmega324pa atmega328p atmega328pb atmega32a atmega32u4 atmega4808 atmega4809 atmega48p atmega64 atmega644 atmega88p attiny13a attiny202 attiny212 attiny214 attiny2313 attiny2313a attiny26 attiny402 attiny404 attiny412 attiny414 attiny416 attiny44a attiny84 attiny85 attiny88 attiny816 attiny828 attiny841 attiny84a attiny861 attiny167 attiny1614 avr64du32 avr64du28
+CHIPS := at90usb1286 atmega1280 atmega1284p atmega128a atmega128rfa1 atmega16 atmega164pa atmega168 atmega16u2 atmega2560 atmega8 atmega8u2 atmega324pa atmega328p atmega328pb atmega32a atmega32u2 atmega32u4 atmega3208 atmega3209 atmega4808 atmega4809 atmega48p atmega64 atmega644 atmega88p attiny13a attiny202 attiny212 attiny214 attiny2313 attiny2313a attiny26 attiny402 attiny404 attiny412 attiny414 attiny416 attiny44a attiny84 attiny85 attiny88 attiny816 attiny828 attiny841 attiny84a attiny861 attiny167 attiny1614 avr64du32 avr64du28
 
 RUSTUP_TOOLCHAIN ?= nightly
 

README.md

@@ -14,12 +14,12 @@ Via the feature you can select which chip you want the register specifications f
 
 |     ATmega      |  ATmega USB  | ATmega 0,1 Series |     AT90      |    ATtiny     |
 | :-------------: | :----------: | :---------------: | :-----------: | :-----------: |
-|    `atmega8`    | `atmega8u2`  |   `atmega4808`    | `at90usb1286` |  `attiny13a`  |
-|   `atmega48p`   | `atmega32u4` |   `atmega4809`    |               |  `attiny167`  |
-|   `atmega64`    | `avr64du32`  |                   |               |  `attiny202`  |
-|   `atmega644`   | `avr64du28`  |                   |               |  `attiny212`  |
-|   `atmega88p`   |              |                   |               |  `attiny214`  |
-|   `atmega16`    |              |                   |               |  `attiny402`  |
+|    `atmega8`    | `atmega8u2`  |   `atmega3208`    | `at90usb1286` |  `attiny13a`  |
+|   `atmega48p`   | `atmega16u2` |   `atmega3209`    |               |  `attiny167`  |
+|   `atmega64`    | `atmega32u2` |   `atmega4808`    |               |  `attiny202`  |
+|   `atmega644`   | `atmega32u4` |   `atmega4809`    |               |  `attiny212`  |
+|   `atmega88p`   | `avr64du32`  |                   |               |  `attiny214`  |
+|   `atmega16`    | `avr64du28`  |                   |               |  `attiny402`  |
 |   `atmega168`   |              |                   |               |  `attiny404`  |
 |  `atmega324pa`  |              |                   |               |  `attiny412`  |
 |  `atmega328p`   |              |                   |               |  `attiny414`  |
@@ -77,7 +77,7 @@ cargo +nightly doc --features <chip> --open
 *avr-device* is generated using [`atdf2svd`](https://github.com/Rahix/atdf2svd) and [`svd2rust`](https://github.com/rust-embedded/svd2rust).  The vendor-provided *atdf* files can be found in `vendor/`.  The intermediate svd files are patched by `svdpatch.py` (Adapted from [`svdpatch.py`](https://github.com/stm32-rs/stm32-rs/blob/master/scripts/svdpatch.py) in [stm32-rs](https://github.com/stm32-rs/stm32-rs)) with device-dependent patches in `patch/`, mainly to improve undescriptive names and missing descriptions.
 
 ### Adding a new Chip
-To add a new chip, download the *atdf* from <http://packs.download.atmel.com/> (or [avr-mcu/packs/](https://github.com/avr-rust/avr-mcu/tree/master/packs)) and place it in `vendor/`.  Be sure to name it like the Rust module that should be generated.  Next, you need to integrate it into the base crate and build system.  Follow what was done in commit [290613454fbd ("Add basic support for ATmega64")](https://github.com/Rahix/avr-device/commit/290613454fbdc5e4ac98e53deccaf74dafc88963).  Please adhere to the alphabetical sorting that is present so far.
+To add a new chip, download the *atdf* from <http://packs.download.atmel.com/> (or [avr-mcu/packs/](https://github.com/avr-rust/avr-mcu/tree/master/packs)) and place it in `vendor/` ***note: file name may need to be modified***.  Be sure to name it like the Rust module that should be generated.  Next, you need to integrate it into the base crate and build system.  Follow what was done in commit [290613454fbd ("Add basic support for ATmega64")](https://github.com/Rahix/avr-device/commit/290613454fbdc5e4ac98e53deccaf74dafc88963).  Please adhere to the alphabetical sorting that is present so far.
 
 Next, you **must** create a `<chipname>.yaml` in `patch/` which has at least the following content:
 ```yaml

patch/atmega16u2.yaml

@@ -0,0 +1,16 @@
+_svd: ../svd/atmega16u2.svd
+
+_include:
+  - "common/ac.yaml"
+  - "common/eeprom.yaml"
+  - "common/spi.yaml"
+  - "common/usart.yaml"
+  - "common/wdt.yaml"
+
+  - "timer/atmega8u2.yaml"
+
+PLL:
+  PLLCSR:
+    _modify:
+      PLOCK:
+        access: read-only

patch/atmega3208.yaml

@@ -0,0 +1,4 @@
+_svd: ../svd/atmega3208.svd
+
+_include:
+  - "common/mega0/port.yaml"

patch/atmega3209.yaml

@@ -0,0 +1,4 @@
+_svd: ../svd/atmega3209.svd
+
+_include:
+  - "common/mega0/port.yaml"

patch/atmega32u2.yaml

@@ -0,0 +1,16 @@
+_svd: ../svd/atmega32u2.svd
+
+_include:
+  - "common/ac.yaml"
+  - "common/eeprom.yaml"
+  - "common/spi.yaml"
+  - "common/usart.yaml"
+  - "common/wdt.yaml"
+
+  - "timer/atmega8u2.yaml"
+
+PLL:
+  PLLCSR:
+    _modify:
+      PLOCK:
+        access: read-only

patch/atmega4808.yaml

@@ -1 +1,4 @@
 _svd: ../svd/atmega4808.svd
+
+_include:
+  - "common/mega0/port.yaml"

patch/atmega4809.yaml

@@ -1 +1,4 @@
 _svd: ../svd/atmega4809.svd
+
+_include:
+  - "common/mega0/port.yaml"

patch/common/mega0/port.yaml

@@ -0,0 +1,107 @@
+PORTC:
+  _delete:
+    OUTSET:
+  _add:
+    OUTSET:
+      description: Output Value Set
+      addressOffset: 0x5
+      size: 0x8
+      access: read-write
+      fields:
+        PC0:
+          description: Pin C0
+          bitRange: "[0:0]"
+          access: read-write
+        PC1:
+          description: Pin C1
+          bitRange: "[1:1]"
+          access: read-write
+        PC2:
+          description: Pin C2
+          bitRange: "[2:2]"
+          access: read-write
+        PC3:
+          description: Pin C3
+          bitRange: "[3:3]"
+          access: read-write
+PORTD:
+  _delete:
+    OUTSET:
+  _add:
+    OUTSET:
+      description: Output Value Set
+      addressOffset: 0x5
+      size: 0x8
+      access: read-write
+      fields:
+        PD0:
+          description: Pin D0
+          bitRange: "[0:0]"
+          access: read-write
+        PD1:
+          description: Pin D1
+          bitRange: "[1:1]"
+          access: read-write
+        PD2:
+          description: Pin D2
+          bitRange: "[2:2]"
+          access: read-write
+        PD3:
+          description: Pin D3
+          bitRange: "[3:3]"
+          access: read-write
+        PD4:
+          description: Pin D4
+          bitRange: "[4:4]"
+          access: read-write
+        PD5:
+          description: Pin D5
+          bitRange: "[5:5]"
+          access: read-write
+        PD6:
+          description: Pin D6
+          bitRange: "[6:6]"
+          access: read-write
+        PD7:
+          description: Pin D7
+          bitRange: "[7:7]"
+          access: read-write
+
+PORTF:
+  _delete:
+    OUTSET:
+  _add:
+    OUTSET:
+      description: Output Value Set
+      addressOffset: 0x5
+      size: 0x8
+      access: read-write
+      fields:
+        PF0:
+          description: Pin F0
+          bitRange: "[0:0]"
+          access: read-write
+        PF1:
+          description: Pin F1
+          bitRange: "[1:1]"
+          access: read-write
+        PF2:
+          description: Pin F2
+          bitRange: "[2:2]"
+          access: read-write
+        PF3:
+          description: Pin F3
+          bitRange: "[3:3]"
+          access: read-write
+        PF4:
+          description: Pin F4
+          bitRange: "[4:4]"
+          access: read-write
+        PF5:
+          description: Pin F5
+          bitRange: "[5:5]"
+          access: read-write
+        PF6:
+          description: Pin F6
+          bitRange: "[6:6]"
+          access: read-write

src/devices/mod.rs

@@ -35,6 +35,10 @@ pub mod atmega164pa;
 #[cfg(feature = "atmega168")]
 pub mod atmega168;
 
+/// [ATmega16u2](https://www.microchip.com/wwwproducts/en/ATmega16u2)
+#[cfg(feature = "atmega16u2")]
+pub mod atmega16u2;
+
 /// [ATmega2560](https://www.microchip.com/wwwproducts/en/ATmega2560)
 #[cfg(feature = "atmega2560")]
 pub mod atmega2560;
@@ -55,10 +59,22 @@ pub mod atmega328pb;
 #[cfg(feature = "atmega32a")]
 pub mod atmega32a;
 
+/// [ATmega32u2](https://www.microchip.com/wwwproducts/en/ATmega32u2)
+#[cfg(feature = "atmega32u2")]
+pub mod atmega32u2;
+
 /// [ATmega32U4](https://www.microchip.com/wwwproducts/en/ATmega32U4)
 #[cfg(feature = "atmega32u4")]
 pub mod atmega32u4;
 
+/// [ATmega3208](https://www.microchip.com/wwwproducts/en/ATmega3208)
+#[cfg(feature = "atmega3208")]
+pub mod atmega3208;
+
+/// [ATmega3209](https://www.microchip.com/wwwproducts/en/ATmega3209)
+#[cfg(feature = "atmega3209")]
+pub mod atmega3209;
+
 /// [ATmega4808](https://www.microchip.com/wwwproducts/en/ATmega4808)
 #[cfg(feature = "atmega4808")]
 pub mod atmega4808;

src/lib.rs

@@ -8,14 +8,18 @@
 #![cfg_attr(feature = "atmega16", doc = "**atmega16**,")]
 #![cfg_attr(feature = "atmega164pa", doc = "**atmega164pa**,")]
 #![cfg_attr(feature = "atmega168", doc = "**atmega168**,")]
+#![cfg_attr(feature = "atmega16u2", doc = "**atmega16u2**,")]
 #![cfg_attr(feature = "atmega2560", doc = "**atmega2560**,")]
 #![cfg_attr(feature = "atmega8", doc = "**atmega8**,")]
 #![cfg_attr(feature = "atmega8u2", doc = "**atmega8u2**,")]
 #![cfg_attr(feature = "atmega324pa", doc = "**atmega324pa**,")]
 #![cfg_attr(feature = "atmega328p", doc = "**atmega328p**,")]
 #![cfg_attr(feature = "atmega328pb", doc = "**atmega328pb**,")]
 #![cfg_attr(feature = "atmega32a", doc = "**atmega32a**,")]
+#![cfg_attr(feature = "atmega32u2", doc = "**atmega32u2**,")]
 #![cfg_attr(feature = "atmega32u4", doc = "**atmega32u4**,")]
+#![cfg_attr(feature = "atmega3208", doc = "**atmega3208**,")]
+#![cfg_attr(feature = "atmega3209", doc = "**atmega3209**,")]
 #![cfg_attr(feature = "atmega4808", doc = "**atmega4808**,")]
 #![cfg_attr(feature = "atmega4809", doc = "**atmega4809**,")]
 #![cfg_attr(feature = "atmega48p", doc = "**atmega48p**,")]
@@ -63,14 +67,18 @@
 //! `atmega16`,
 //! `atmega164pa`,
 //! `atmega168`,
+//! `atmega16u2`,
 //! `atmega2560`,
 //! `atmega8`,
 //! `atmega8u2`,
 //! `atmega324pa`
 //! `atmega328p`,
 //! `atmega328pb`,
 //! `atmega32a`
+//! `atmega32u2`,
 //! `atmega32u4`,
+//! `atmega3208`,
+//! `atmega3209`,
 //! `atmega4808`,
 //! `atmega4809`,
 //! `atmega48p`,
@@ -232,12 +240,16 @@ compile_error!(
     * atmega16
     * atmega164pa
     * atmega168
+    * atmega16u2
     * atmega2560
     * atmega324pa
     * atmega328p
     * atmega328pb
     * atmega32a
+    * atmega32u2
     * atmega32u4
+    * atmega3208
+    * atmega3209
     * atmega4808
     * atmega4809
     * atmega48p
@@ -292,6 +304,8 @@ pub use crate::devices::atmega16;
 pub use crate::devices::atmega164pa;
 #[cfg(feature = "atmega168")]
 pub use crate::devices::atmega168;
+#[cfg(feature = "atmega16u2")]
+pub use crate::devices::atmega16u2;
 #[cfg(feature = "atmega2560")]
 pub use crate::devices::atmega2560;
 #[cfg(feature = "atmega324pa")]
@@ -302,8 +316,14 @@ pub use crate::devices::atmega328p;
 pub use crate::devices::atmega328pb;
 #[cfg(feature = "atmega32a")]
 pub use crate::devices::atmega32a;
+#[cfg(feature = "atmega32u2")]
+pub use crate::devices::atmega32u2;
 #[cfg(feature = "atmega32u4")]
 pub use crate::devices::atmega32u4;
+#[cfg(feature = "atmega3208")]
+pub use crate::devices::atmega3208;
+#[cfg(feature = "atmega3209")]
+pub use crate::devices::atmega3209;
 #[cfg(feature = "atmega4808")]
 pub use crate::devices::atmega4808;
 #[cfg(feature = "atmega4809")]