Spi drivers #19820
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Spi drivers #19820
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tests/periph_spi: printing and testing SPI clock rates drivers/periph_spi: change API of spi_acquire (from RIOT-OS#15904) drivers/periph_spi: add the `bus` parameter to spi_get_*() This was necessary for implementations where multiple devices can have different clock sources. This broke the macros SPI_CLK_* that were reverted to an enum. periph/spi: adapted to the new API Arbitrary speed support was added to all implementations where it was missing. 2023-06: - rebased on current master - some backports from 2022 RIOT-OS#18374 - 3 new implementations adapted (gd32v, rpx0xx, and esp32) - minial frequency asserts was replaced by return codes - useless upper frequency bounding removed from many implementations - SPI_DIV_UP was replaced by the new DIV_ROUND_UP from macros/math.h - driver clock configuration caching was removed from implementations where it exists because it should be done at application level with this new API - br computation was simplified for stm32 / gd32v as performace optimisation is no longer needed at this level and the inaccuracy of the fixed point arithmetic was unreliable for frequencies requested lower but close to resulting frequencies
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Platform: native
nandojve
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Aug 1, 2023
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| /* Atmega datasheets give the following table: | ||
| * SPI2X SPR1 SPR0 SCK Frequency | ||
| * 0 0 0 Fosc/4 | ||
| * 0 0 1 Fosc/16 | ||
| * 0 1 0 Fosc/64 | ||
| * 0 1 1 Fosc/128 | ||
| * 1 0 0 Fosc/2 | ||
| * 1 0 1 Fosc/8 | ||
| * 1 1 0 Fosc/32 | ||
| * 1 1 1 Fosc/64 | ||
| * We can easily sort it by dividers by inverting the SPI2X bit and | ||
| * taking it as LSB: | ||
| * Divider SPR1 SPR0 ~SPI2X shift | ||
| * 2 0 0 0 0 | ||
| * 4 0 0 1 1 | ||
| * 8 0 1 0 2 | ||
| * 16 0 1 1 3 | ||
| * 32 1 0 0 4 | ||
| * 64 1 0 1 5 | ||
| * 64 1 1 0 6 | ||
| * 128 1 1 1 7 */ | ||
| uint8_t shift; |
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Please update documentation to reflect xmega reference manual.
SPI2X -> CLK2X
SPR1/0 -> prescaler[1:0]
Fosc -> Clkper
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| uint8_t shift = ((~clk.ctrl_clk2x_prescaler & 0x80) >> 7) | ||
| | (clk.ctrl_clk2x_prescaler << 1); |
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uint8_t shift = ((~clk.ctrl_clk2x_prescaler & 0x80) >> 7)
- | (clk.ctrl_clk2x_prescaler << 1);
+ | (clk.ctrl_clk2x_prescaler << 1);
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| return shift > 5 ? | ||
| CLOCK_CORECLOCK >> shift : (CLOCK_CORECLOCK / 2) >> shift; |
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- return shift > 5 ?
- CLOCK_CORECLOCK >> shift : (CLOCK_CORECLOCK / 2) >> shift;
+ return shift > 5
+ ? CLOCK_CORECLOCK >> shift
+ : (CLOCK_CORECLOCK / 2) >> shift;
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| for (shift = 0; freq << shift < CLOCK_CORECLOCK / 2; | ||
| shift = ++shift > 5 ? shift + 1 : shift) {} | ||
| return shift; |
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make explicit the operations using parenthesis.
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| uint8_t shift = _clk_shift(freq); | ||
| return (spi_clk_t) | ||
| { .ctrl_clk2x_prescaler = ((~shift & 1) << 7) | (shift >> 1) }; |
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- { .ctrl_clk2x_prescaler = ((~shift & 1) << 7) | (shift >> 1) };
+ { .ctrl_clk2x_prescaler = ((~shift & 1) << 7)
+ | (shift >> 1) };
| { | ||
| (void)bus; | ||
| /* bound divider to 128 */ | ||
| if(freq < DIV_ROUND_UP(CLOCK_CORECLOCK, 128)) { |
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keyword 'if' not followed by a single space
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Contribution description
Split from #16727
Affected packages
Affected device drivers
Affected tests
Testing procedure
Issues/PRs references