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boards/stm32f0: introduce default shared clock configuration header #14891

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merged 2 commits into from
Sep 1, 2020

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@aabadie aabadie commented Aug 30, 2020

Contribution description

This PR is similar to #stm32l1 but applied to the stm32f0 family. In master, all stm32f0 based boards are configured the same way, except the nucleo-f030 and nucleo-f042. There are also some boards that provide an LSE and some not, some having an HSE and others not.
To take this into account, the default configuration has good defaults (HSE set to 8MHz, no LSE and PLL prescalers used in the majority of boards. All theses parameters can be overridden by the boards themselves depending on their configuration.
Doing this removes a bit of code duplication between the boards configurations.

The idea of this PR is first to prepare the migration toward a fully configurable clock like it's done for stm32gx (and stm32l4/wb in #14866), without changing the current situation. Having a common and default configuration file will make things easier (to refactor and to review).

Testing procedure

  • A green Murdock
  • Verify that the boards are still functional

Issues/PRs references

None

@aabadie aabadie added Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: cleanup The issue proposes a clean-up / The PR cleans-up parts of the codebase / documentation Area: boards Area: Board ports labels Aug 30, 2020
@aabadie aabadie requested a review from fjmolinas August 30, 2020 15:18
@aabadie aabadie added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Aug 30, 2020
@aabadie aabadie force-pushed the pr/boards/stm32f0_default_clock branch from e914774 to 48a8d29 Compare August 30, 2020 20:06
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ACK, binaries did not change for nucleo-f091rc and BOARD is still functional.

@fjmolinas fjmolinas merged commit c44a43d into RIOT-OS:master Sep 1, 2020
@aabadie aabadie deleted the pr/boards/stm32f0_default_clock branch September 1, 2020 12:01
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3 participants