boards/stm32f0: introduce default shared clock configuration header #14891
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Contribution description
This PR is similar to #stm32l1 but applied to the stm32f0 family. In master, all stm32f0 based boards are configured the same way, except the nucleo-f030 and nucleo-f042. There are also some boards that provide an LSE and some not, some having an HSE and others not.
To take this into account, the default configuration has good defaults (HSE set to 8MHz, no LSE and PLL prescalers used in the majority of boards. All theses parameters can be overridden by the boards themselves depending on their configuration.
Doing this removes a bit of code duplication between the boards configurations.
The idea of this PR is first to prepare the migration toward a fully configurable clock like it's done for stm32gx (and stm32l4/wb in #14866), without changing the current situation. Having a common and default configuration file will make things easier (to refactor and to review).
Testing procedure
Issues/PRs references
None