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TEST: per-port submodule cache #7

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TEST: per-port submodule cache #7

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2 changes: 2 additions & 0 deletions ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h
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Original file line number Diff line number Diff line change
Expand Up @@ -27,3 +27,5 @@

#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01)
#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02)

// TEST: touch to build this board
2 changes: 2 additions & 0 deletions ports/raspberrypi/boards/adafruit_feather_rp2040/mpconfigboard.h
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Expand Up @@ -20,3 +20,5 @@

#define DEFAULT_UART_BUS_RX (&pin_GPIO1)
#define DEFAULT_UART_BUS_TX (&pin_GPIO0)

// TEST: touch to build this board
2 changes: 2 additions & 0 deletions ports/stm/boards/espruino_pico/mpconfigboard.h
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Expand Up @@ -24,3 +24,5 @@
// #define LSE_VALUE ((uint32_t)32768)

#define MICROPY_FATFS_EXFAT 0

// TEST: touch to build this board
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