Releases: MIPT-ILab/mipt-mips
MIPT-V 2022
Adoption of C++20 for cleaner code:
- Implementation-independent signed number representation
- Concepts
- Concept-constrained auto
Bug fixes
Convergence with mainline RISC-V opcodes
- riscv/riscv-opcodes#112
- riscv/riscv-opcodes#113
- riscv/riscv-opcodes#114
- riscv/riscv-opcodes#118
- riscv/riscv-opcodes#119
- riscv/riscv-opcodes#120
- riscv/riscv-opcodes#121
- riscv/riscv-opcodes#122
Testing infrastructure upgrades
- LLVM 14
External bugs reported
- Visual Studio: 1662465
- LLVM: llvm/llvm-project#53961, llvm/llvm-project#53997, llvm/llvm-project#54011
MIPT-V / MIPT-MIPS 2021 Release 2
RISC-V bit manipulation instructions
bcli
by Vasilii Matreninbclr
by Andrey Vyazovtsevbset
by Ivan Panferovbseti
by Kirill Radkinorc.b
by Michael Bargatinsext.b
by Alexey Otrashchenko- Deprecate
gorci
.
Testing infrastructure upgrades
- LLVM 12
Extracted Flowchart visualizer to a separate repository: https://github.com/MIPT-ILab/PipelineFlowchartVis
MIPT-V / MIPT-MIPS 2021
Pipeline Visualization Tool by BSUIR students Alex Kulsha and Andrei Karpyza under Anton Lechanka supervising.
RISC-V bit manipulation instructions
ror
by Vladimir Graudtgorci
by Alexey Shcherbakovmax
andmaxu
by Anton Okleyrori
by Egor Titovsbinv
by Eugene Naydanovshfl
by Mihail Fedorovmin
andminu
by Vasilii Zaitsevsloi
andsroi
by Ravil Zakiryanovpacku
by Ivan Burtakov
Performance Simulation
- #1448: wrongpath code prefetching by Vladislav Zhuravski
Bug fixes
- #1257 follow up: pipeline must be flushed only once per cycle.
- RISC-V
bfp
instruction fixed according to 0.92 specification.
Testing infrastructure upgrades
- #512: unit tests for Branch module and infrastructure to test more modules by Vladimir Graudt
- #1409, #1410: clean up of RISC-V ALU and testing code by Vladimir Graudt
- C++20
- Catch 2.13.6
- GDB 10.2
- ELFIO 3.8
Switched to Github Actions from Travis CI
External PRs
- LGTM: github/codeql#5709
- LLVM: 46235
- RISC-V: riscv/riscv-opcodes#53
MIPT-V / MIPT-MIPS 2020
99.99% test coverage!
Functional simulation
- MARS system calls for RISC-V ISA by Eric Konks
- Support of
.bss
Elf sections by Pavel Kryukov
Performance simulation
- #1257: make system calls flush pipeline to maintain functional correctness by Eric Konks
- #1233: branch prediction bug reported by Oleg Ladin, fixed by Pavel Kryukov
- #1256: register state duplication to maintain functional correctness by Pavel Kryukov
RISC-V
- Support of SLLID, SRLID, SRAID, and ADDID instructions by Pavel Kryukov
Testing infrastructure upgrades
- Catch 2.11.1
- Clang-Tidy 10
- GDB 9.1
- LGTM
- Microsoft Visual Studio 2019
- OpenCppCoverage
External PRs
- CEN64: n64dev/cen64#141, n64dev/cen64#142, n64dev/cen64#143, n64dev/cen64#144
- GDB: build/25268, build/25289
- LLVM: 44816, 44977, 45046, 45507, 45514
- POPL: badaix/popl#18, badaix/popl#19
- RISC-V: riscv/riscv-opcodes#41
MIPT-V / MIPT-MIPS 2019 Release 3
RISC-V bit manipulation instructions
bfp
by Kirill Chemrovclmul
by Yaroslav Okatevclz
andctz
by Alexandr Vinogradovgrev
by Airat Nazmievgorc
by Roman Zlobinorn
by Igor Bulatovpack
by Daniel Kofanovpcnt
by Nikolay Zernovrol
by Nikita Gorbachevsbext
by Vladimir Prokhorovslo
by Eric Konkssro
by Maxim Davydovunshfl
by Yuly Tarasov and Pavel Kryukovxnor
by Ilya Burtakov
Performance simulation
- #1200: branch prediction bug reported by Oleg Ladin, fixed by Pavel Kryukov
Tools
- Automated pipeline graphs by Eric Konks
- Standalone cache model by Pavel Kryukov
Testing infrastructure upgrades
- ARM-hosted builds on Travis CI
- Clang-Tidy 9
New Manuals
External PRs
MIPT-MIPS / MIPT-V 2019 Release 2
99% test coverage!
RISC-V
- Functional modeling of C instructions by Pavel Kryukov and Rustem Yunusov
System simulation updates by Pavel Kryukov
- MIPS32/MARS exception handling
- System calls support for performance simulation
- Interactive cycle-accurate modeling with GDB
Cache modeling
- Models of infinite and always-hit tag arrays by Andrey Agrachev and Pavel Kryukov
- Configurable replacement policy of IC and BP by Pavel Kryukov
- Optimized true LRU implementation by Pavel Kryukov
Outputs
- Modularized logging by Pavel Kryukov
External PRs
- LLVM: 43109
MIPT-MIPS / MIPT-V 2019
98% test coverage!
RISC-V
- Test infrastructure by Pavel Kryukov
- I instructions implemented by Pavel Kryukov
- M instructions implemented by Yaheni Sharamed
- C instructions decoder by Rustem Yunusov
- Print of 128 bit numbers by Andrey Agrachev
System simulation
- Several options of precise trap modeling by Vsevolod Pukhov
- Build with 'vanilla' GDB 8.3 source files by Pavel Kryukov
- GDB-driven manipulations with registers and program counter by Pavel Kryukov
Branch prediction
- Decoupling of BTB and BP pipelines by Yan Logovsky and Pavel Kryukov
- Early detection of branch target mispredictions by Yan Logovsky
- Performance improvement for MIPS likely branches by Rustem Yunusov
- Calculation of branch misprediction rate by Yaheni Sharamed
- Bypass of return address to execution by Yaheni Sharamed
- Bug fixes:
- Do not flush pipeline on target mispredict for not taken branch (Yan Logovsky)
- Allow update of BTB from short mispredicts and long mispredicts (Rustem Yunusov)
Cache improvements by Andrey Agrachev
- Infrastructure for cache replacement policies
- Pseudo-LRU replacement policy
- Use of Google Dense Hash for simulation speed
Execution pipeline improvement by Egor Bova
- Initial support for multi-wide writeback stage
MIPS
- Generation of MIPS traps by Vsevolod Pukhov
- Unit tests for MIPS instructions by Egor Bova. Bug fixes:
- Treat
dadd
anddaddu
as MIPS III instructions - Fix of 64-bit multiplication on x86 targets and/or VS builds
- Branch-and-link instructions should link even if not taken
- Use only LSB of the variable shift RHS operand (#709)
- Treat
- Decoding of CP1 (floating point) instructions by Egor Bova.
- Support of branch delay slot by Pavel Kryukov and Andrey Agrachev
- Big-endian MIPS by Pavel Kryukov
Complete refactoring of port system by Pavel Kryukov
- Dynamic type matching
- Self-cleaning
- Arena allocations with optimizations for POD-based data structures
- Type erasure for ports to reduce amount of templates
- Translation of port templates in a separate translation unit
- As a result, 1.5x simulation speed and 2x compilation speed boosts
New manuals
- Branch prediction pipelines by Rustem Yunusov (in progress)
External PRs:
- Boost: boostorg/multiprecision#129
- GDB: 444b3fa, 8f0a214, dc7e818, 7516c26
- LLVM:
- POPL: badaix/popl#16
- RISC-V:
- Visual Studio:
MIPT-MIPS 2018 release 3
MIPS
- Compatibility with basic MARS system calls conventions by Vyacheslav Kompan
- Interactive functional simulation mode with GDB by Vyacheslav Kompan
- Interface-level integration to cycle-accurate simulation of Nintendo® 64 in CEN64 environment by Pavel Kryukov
Branch prediction
- Extraction of branch misprediction unit of Mem unit by Yauheni Sharamed
- 'Always not taken' branch prediction mode by Yan Logovsky
- Bubble sort to demonstrate sensitivity of IPC to branch prediction by Yauheni Sharamed
Quality assurance
- Unit tests for MIPS instructions by Vsevolod Pukhov. One bug reported.
- Unit test coverage for branch prediction modes by Yan Logovsky. One bug reported.
Code quality
- Decoupling functional memory from CPU simulation by Vyacheslav Kompan. Pavel Kryukov, and Arsen Davtyan
- Deep refactoring of MIPS decoding code by Andrey Agrachev, Vsevolod Pukhov and Pavel Kryukov
- Narrow-safe type conversion by Arsen Davtyan
- Endian-wrapping infrastructure by Pavel Kryukov
- Lazy dumping mode by Pavel Kryukov
New manuals:
- „Implementation of Data Bypassing and Scoreboard“ by Denis Los
- „How to debug MIPT-MIPS with GDB“ by Ivan Startsev (in progress)
External PRs:
- GDB: 2283a21
- CEN64:
- LLVM: 39770
- POPL: badaix/popl#15
- RISC-V: riscv/riscv-opcodes#22
- ELFIO: serge1/ELFIO#28
MIPT-MIPS 2018 release 2
Micro-architectural precision:
- Support bypass for MIPS
mthi
instruction by Denis Los
Quality assurance:
- Sequence identifier of executed instruction by Yan Logovsky and Pavel Kryukov
- Code coverage tracking with CodeCov by Pavel Kryukov
- Infrastructure to select MIPS ISA version by Pavel Kryukov
Bug fixes:
- MIPS64: fixes for LWL, SWL, and SRL instructions by Pavel Kryukov
Integration of portable libraries:
- Catch2: single-header framework for unit tests. Integrated by Vyacheslav Kompan and Pavel Kryukov.
- POPL: single-header options parser developed by Johannes Pohl. Integrated by Pavel Kryukov.
- ELFIO: C++ ELF parser developed by Serge Lamikhov-Center. Integrated by Pavel Kryukov.
New manuals:
External PRs:
- POPL: see 1.2.0 release notes
- ELFIO: serge1/ELFIO#26, serge1/ELFIO#27
MIPT-MIPS 2018
Micro-architectural precision:
- Fetching unit incorporating Instruction cache by Aleksandr Misevich
- Data bypasses and complex pipeline by Denis Los
Support of more MIPS instructions:
- Multiplication and division instructions:
- MIPS I:
mult
,multu
,div
,divu
,mfhi
,mflo
,mthi
,mtlo
by Pavel Kryukov - MIPS32:
mul
by Pavel Kryukov
- MIPS I:
- Accumulating multiplication of MIPS32 by Andrei Sultan:
madd
,maddu
,msub
,msubu
- Unaligned memory accesses by Andrei Sultan:
lwl
,lwr
,swl
,swr
- Linked loads/conditional stores without atomicity warranties by Pavel Kryukov:
ll
,sc
MIPS64 infrastructure and experimental implementation of instructions by Kirill Nedostoev, Alexander Timofeev, and Pavel Kryukov
- Doubleword arithmetics (MIPS III):
dadd
,daddiu
,daddu
,dsub
,dsubu
- Doubleword shifts (MIPS III):
dsll
,dsll32
,dsra
,dsra32
,dsrl
,dsrl32
- Doubleword variable shifts (MIPS III):
dsllv
,dsrav
,dsrlv
- Doubleword memory accesses (MIPS III):
ld
,lwu
,sd
,lld
,scd
- Doubleword multiplication/division (MIPS III):
ddiv
,ddivu
,dmult
,dmultu
- Doubleword count leading zeroes/ones (MIPS64):
dclo
,dclz
RISC-V preparations by Aleksandr Misevich:
- Generalized infrastructure to support several ISA
- Placeholder for RISC-V implementation
- Implementation of RISC-V register file
Quality Assurance:
- CMake build and testing flow by Konstantin Soshin
- Unit tests for Register and Register File classes by Aleksandr Misevich
- Strict timing primitives by Denis Los
- Wrong code detector by Pavel Kryukov
Simulation speed improvements:
- Cached instruction integration to performance simulation by Pavel Kryukov
New manuals:
- „CMake“ by Konstantin Soshin
- „Introduction to TDD“ by Pavel Kryukov and Aleksandr Misevich
External PRs:
- AppVeyor: appveyor/ci#2096, appveyor/ci#2154
- EduMIPS64: EduMIPS64/edumips64#177
- LLVM: 36283, 36284, 36961, 36963
- Visual Studio: 225040