Fixed a bunch of outdated pad styles

[evanshultz]

I believe all footprints in this PR have been split into smaller PRs which you can see linked below. So please do not merge this!

This is a big one, so grab a cup of coffee and sit down in a comfy chair. Or... you can trust me and merge with a quick review. :)

I set out to address footprints listed at #266, and I found a few more with outdated pad designs so I fixed them up too.

Changed multiple overlapping pads to a single custom pad:

• Inductor_SMD/L_Coilcraft_LPS4018 (also moved silkscreen from under part body)
• Inductor_SMD/L_Wuerth_WE-TPC-3816
• Package_DFN_QFN/Infineon_MLPQ-16-14-1EP_4x4mm_P0.5mm
• Package_DFN_QFN/Infineon_MLPQ-40-32-1EP_7x7mm_P0.5mm
• Package_DFN_QFN/Infineon_PQFN-22-15-4EP_6x5mm_P0.65mm
• Package_DFN_QFN/Infineon_PQFN-44-31-5EP_7x7mm_P0.5mm
• Package_DFN_QFN/ST_UFQFPN-20_3x3mm_P0.5mm
• Package_TO_SOT_SMD/HVSOF5 (and fix pad X position)
• Package_TO_SOT_SMD/LFPAK33
• Package_TO_SOT_SMD/LFPAK56 (I didn't touch the other LFPAK56 because they're non-standard and perhaps should be removed?)
• Package_TO_SOT_SMD/PQFN_8x8 (this needed a few dimensional fixes too)
• Package_TO_SOT_SMD/SOT-89-3 (no referenced datasheet so picked the closest one and updated the footprint to match)
• Package_TO_SOT_SMD/SOT-89-3_HandSoldering
• Package_TO_SOT_SMD/SOT-89-5
• Package_TO_SOT_SMD/SOT-89-5_HandSoldering
• Package_TO_SOT_SMD/TDSON-8-1 (nearly all dimensions were wrong so this got fixed too)
• Package_TO_SOT_SMD/Vishay_PowerPAK_SC70-6L_Single

Changed existing custom pads' zone connection:

• Package_SO:PowerPAK_SO-8_Dual
• Package_SO:PowerPAK_SO-8_Single
• Package_SO:Vishay_PowerPAK_1212-8_Dual
• Package_SO:Vishay_PowerPAK_1212-8_Single

Removed pin number from paste pads:

• Package_TO_SOT_SMD/ATPAK-2
• Package_TO_SOT_SMD/ROHM_HRP7

Merged multiple adjacent pads into a single one:

• Package_DFN_QFN/DFN-S-8-1EP_6x5mm_P1.27mm
• Package_DFN_QFN/Linear_UGK52_QFN-46-52
• Package_DFN_QFN/Microchip_8E-16
• Package_DFN_QFN/Microsemi_QFN-40-32-2EP_6x8mm_P0.5mm (also fixed line widths)
• Package_DFN_QFN/Mini-Circuits_DL805 (and removed silk to mark pin 1)
• Package_DFN_QFN/Texas_RUM0016A
• Package_DFN_QFN/Texas_R_PUQFN-N12
• Package_DFN_QFN/Texas_VQFN-RGR-20
• Package_DFN_QFN/Texas_VQFN-RGW-20
• Package_DFN_QFN/UDFN-4_1x1mm_P0.65mm (and updated silk and moved courtyard to 0.25mm clearance and added datasheet)
• Package_TO_SOT_SMD/Infineon_PG-HSOF-8-1 (basically a total do-over)
• Package_TO_SOT_SMD/Infineon_PG-HSOF-8-1_ThermalVias (basically a total do-over)
• Package_TO_SOT_SMD/Infineon_PG-HSOF-8-2 (new footprint)
• Package_TO_SOT_SMD/Infineon_PG-HSOF-8-2_ThermalVias (new footprint)
• Package_TO_SOT_SMD/Infineon_PG-HSOF-8-2_ThermalVias2 (new footprint)
• Package_SO:Diodes_PSOP-8
• Package_SO:HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown
• Package_SO:HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias
• Package_SO:HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown
• Package_SO:HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown_ThermalVias
• Package_SO:Infineon_PG-DSO-8-43
• Package_SO:PowerPAK_SO-8_Dual
• Package_SO:PowerPAK_SO-8_Single
• Package_SO:TI_SO-PowerPAD-8 (does not match doc; starts with "TI" and not "Texas")
• Package_SO:TI_SO-PowerPAD-8_ThermalVias (does not match doc; starts with "TI" and not "Texas")
• Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
• Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
• Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm

Other changes:

• Package_TO_SOT_SMD/TDSON-8-1_HandSoldering: Removed since the X dimension was +/-3.5mm and the fixed reflow one is +/-3.325mm

I left alone QFNs with odd-shaped corner pads and/or D-shaped pads since I believe Rene's fancy generator script can (or could) make them.

Dimensioned drawings and screenshots, where relevant, to follow.

Edit: Removed items that were split off into other PRs.

---

Thanks for creating a pull request to contribute to the KiCad libraries! To speed up integration of your PR, please check the following items:

• Provide a URL to a datasheet for the footprint(s) you are contributing
• An example screenshot image is very helpful
• If there are matching symbol or 3D model pull requests, provide link(s) as appropriate
• Check the output of the Travis automated check scripts - fix any errors as required

[evanshultz]

Obviously a ton of Travis errors, mostly because these are old footprints. I'll work through them.

[evanshultz]

Coilcraft LPS4018

https://www.coilcraft.com/pdfs/lps4018.pdf

I update this footprint's custom pads so both appear in the current version of KSU. Here's an update showing just pad dimensions:

[evanshultz]

https://www.rohm.com/datasheet/BU52014HFV/bu52004gul-e

I fixed the courtyard after dimensioning this.

[evanshultz]

https://www.fairchildsemi.com/datasheets/FD/FDMT80080DC.pdf

I fixed the courtyard after dimensioning.

[evanshultz]

http://ww1.microchip.com/downloads/en/DeviceDoc/3L_SOT-89_MB_C04-029C.pdf

I kept the existing body width of 5mm even though this Microchip datasheet shows 4.5mm.

[evanshultz]

https://www.infineon.com/cms/en/product/packages/PG-TDSON/PG-TDSON-8-1/

[evanshultz]

http://ww1.microchip.com/downloads/en/DeviceDoc/MIC550x-300mA-Single-Output-LDO-in-Small-Packages-DS20006006A.pdf

I'm not sure what is the correct courtyard spacing for this. Should it be 0.25mm like other DFNs? 1mm like BGAs? Either way, it's not equal on all sides so something is wrong.

[evanshultz]

https://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/

https://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/

[evanshultz]

That's all the footprints that need dimensioned drawings, I think. Next I'll show screenshots for all footprints (save the Wuerth one that isn't finished) in the order they're listed above unless the changes was simply making one big pads instead of a matrix of pads.

[evanshultz]

That leaves the following questions

1. Should Package_DFN_QFN/Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_Pad5.x5x5.x5mm footprints have the _Pad* removed from their 3D model name? I think so.
2. Should the same footprints use a different nomenclature? I don't know why they got merged this way but the _Pad* should be _EP*. Change it?
3. Remove LFPAK56 with vias since they're not from the datasheet and seem like a specific implementation? All vias are way outside the footprint boundary. It seems to me this should be done on the board or a local library but not in our official library.
4. Should SOT-89 footprints shrink the body size to match the datasheet? I chose one with the biggest pads that were similar (but still a bit smaller) than the footprint in our lib which had no datasheet.
5. Rename Texas_WQFN-MR-100_*3x3-DapStencil to something better? Perhaps just Texas_S-PWQFN-N100 or Texas_RKM-100 (we should really figure out how we are going to name these weird TI footprints) and of course the _ThermalVias version?
6. Courtyard clearance for UDFN-4_1x1mm_P0.65mm?

I wrote a short script to search libraries for the footprint used so that can help us track down some of the potential impact of the items above.

[evanshultz]

I just pushed the last footprint I'm aware of that belongs in this group of footprints. In the original footprint pin 1 was at the top, but current KLC says it should be on the left. I haven't rotated the footprint for compatibility reasons.

http://katalog.we-online.de/pbs/datasheet/7440310047.pdf

This PR is now ready for review. Please see the questions above.

[evanshultz]

Just commited changes to the Package_SO lib. Didn't notice those before. In general I just kept them the same as before only merging pads. The list in the first comment is updated.

[Misca1234]

@KiCad/librarians

This is a big one, so grab a cup of coffee and sit down in a comfy chair.
Or... you can trust me and merge with a quick review. :)

Anyone oppose to trust him ?

[poeschlr]

The main thing i would suggest to check is that all pads have zone connect set to solid instead of none (for polygon pads the default is none so it could easily happen. There sadly is no option to select thermals for polygon pads.)

[Misca1234]

You mean something like this

[evanshultz]

@poeschlr
So what you write only applies, to polygon pads, right?

I disagree with having a solid connection on all pads because that will make soldering difficult, but if the only choices are Solid and None I understand why Solid must be chosen. Sigh.

Please confirm the below and I'll update.

@Misca1234
That should work for footprints with only custom pads.

However, most of these footprints have only a few custom pads and so I believe we will then use the pad-specific connection setting seen here:

We would not want Solid connection everywhere if it doesn't have to be, so we can do it per-pad on many footprints.

[myfreescalewebpage]

Conflict due to merging of #1459 to be fixed @evanshultz

[myfreescalewebpage]

@evanshultz looking at the git diff, I'm not sure of the deletion of the two footprints we have discussed...

[evanshultz]

Here it is in renaming of these files in the web editor:

And I checked the files in this branch again and the DapStencil one don't exist.

Am I missing something?

[myfreescalewebpage]

Following the integration of the other PR, the new footprints just simply exist.
In the current PR, we should just see that the DapStencil footprints are removed, not renamed, else you will overwrite the new footprints.

[poeschlr]

@evanshultz is this still relevant or was it replaced with the other pull requests?

[evanshultz]

I believe all changes here should be in separate PRs, but I kept this open as a 'meta' bug to track progress.

[jneiva08]

@evanshultz i need to make footprint for Wuerth TPC with another size
in the description you have put, "StepUp generated footprint"
How can use StepUp to make?

[evanshultz]

@jneiva08
I am no expert but I got help from @easyw at #972. Hopefully that documents my struggles enough for you to follow along.