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Add llvm.abs.i32 translation #758

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Oct 7, 2020
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Add llvm.abs.i32 translation #758

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0850066
Add llvm.abs.i32 intrinsic translation
MochalovaAn Sep 29, 2020
47b160d
Test extension and type checking improvements
MochalovaAn Oct 2, 2020
331a7a8
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MochalovaAn Oct 3, 2020
a8f86c3
Format fix
MochalovaAn Oct 6, 2020
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Test extension and type checking improvements 
Signed-off-by: amochalo <anastasiya.mochalova@intel.com>
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@MochalovaAn
MochalovaAn committed Oct 4, 2020
commit 47b160d8ec592855d39ee8348df78fa66411d8de
16 changes: 16 additions & 0 deletions lib/SPIRV/SPIRVUtil.cpp
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Expand Up @@ -1549,6 +1549,22 @@ bool checkTypeForSPIRVExtendedInstLowering(IntrinsicInst *II, SPIRVModule *BM) {
}
break;
}
case Intrinsic::abs: {
    Type *Ty = II->getType();
    int NumElems = 1;
    if (auto *VecTy = dyn_cast<FixedVectorType>(Ty)) {
      NumElems = VecTy->getNumElements();
      Ty = VecTy->getElementType();

}
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    if ((!Ty->isIntegerTy()) ||
        ((NumElems > 4) &&
        (NumElems != 8) && (NumElems != 16))) {
`       BM->getErrorLog().checkError(false, SPIRVEC_InvalidFunctionCall,
                                   II->getCalledOperand()->getName().str(), "",
                                   __FILE__, __LINE__);
}
}
default:
break;
}
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7 changes: 6 additions & 1 deletion test/abs.ll
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Expand Up @@ -4,21 +4,26 @@
; RUN: spirv-val %t.spv


; CHECK: ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} s_abs
; CHECK: ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} s_abs

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-linux-sycldevice"

; Function Attrs: norecurse nounwind readnone
define dso_local spir_kernel void @test(i32 %a) local_unnamed_addr #0 !kernel_arg_buffer_location !5 {
define dso_local spir_kernel void @test(i32 %a, <4 x i32> %b) local_unnamed_addr #0 !kernel_arg_buffer_location !5 {
entry:
%0 = tail call i32 @llvm.abs.i32(i32 %a, i1 0) #2
%1 = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> %b, i1 0) #2
ret void
}

; Function Attrs: inaccessiblememonly nounwind willreturn
declare i32 @llvm.abs.i32(i32, i1) #1

; Function Attrs: inaccessiblememonly nounwind willreturn
declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1) #1

attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="test.cl" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
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