Merge pull request #217 from KrzysztofHerman/dev

.SPICEINIT hotfix
IHP-GmbH · Oct 14, 2024 · 544dada · 544dada
2 parents 4bf8f9f + 1e14418
commit 544dada
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Showing 6 changed files with 99 additions and 35 deletions.
diff --git a/.gitignore b/.gitignore
@@ -14,7 +14,6 @@ dist/
 downloads/
 eggs/
 .eggs/
-lib/
 lib64/
 parts/
 sdist/
@@ -160,6 +159,7 @@ cython_debug/
 #.idea/
 
 *.raw
+*.la
 *.spice
 *.csv
 *.osdi
@@ -173,4 +173,4 @@ cython_debug/
 unit_tests_*
 lvs_run_*
 *_extracted.cir
-cells_tests_*
+cells_tests_*
diff --git a/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_dummy.lib b/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_dummy.lib
@@ -1540,4 +1540,78 @@ library (sg13g2_io_dummy) {
             voltage_name : "iovdd";
         }
     }
+    cell (sg13g2_IOPadAnalog) {
+        area: 14400;
+        dont_touch : true;
+        dont_use : true;
+        timing_model_type : abstracted;
+        pad_cell : true;
+        pg_pin (vss) {
+            pg_type : primary_ground;
+            voltage_name : "vss";
+        }
+        pg_pin (vdd) {
+            pg_type : primary_power;
+            voltage_name : "vdd";
+        }
+        pg_pin (iovss) {
+            pg_type : primary_ground;
+            voltage_name : "iovss";
+        }
+        pg_pin (iovdd) {
+            pg_type : primary_power;
+            voltage_name : "iovdd";
+        }
+        pin (pad) {
+            direction : inout;
+            function : "(pad)";
+            output_voltage : core_output;
+            related_ground_pin : vss;
+            related_power_pin : vdd;
+            max_capacitance : 500;
+            max_transition : 200;
+            timing () {
+                related_pin : "pad";
+                timing_type : combinational;
+                cell_rise (delay_template_2x2) {
+                    values ( \
+                        "1000, 1000", \
+                        "1000, 1000" \
+                    );
+                }
+                rise_transition (delay_template_2x2) {
+                    values ( \
+                        "200, 200", \
+                        "200, 200" \
+                    );
+                }
+                cell_fall (delay_template_2x2) {
+                    values ( \
+                        "1000, 1000", \
+                        "1000, 1000" \
+                    );
+                }
+                fall_transition (delay_template_2x2) {
+                    values ( \
+                        "200, 200", \
+                        "200, 200" \
+                    );
+                }
+            }
+        }
+        pin (padres) {
+            direction : inout;
+            is_pad : false;
+            input_voltage : io_input;
+            related_ground_pin : iovss;
+            related_power_pin : iovdd;
+            max_transition : 200;
+            capacitance : 15.0;
+            rise_capacitance : 15.0;
+            rise_capacitance_range (12.0, 15.0);
+            fall_capacitance : 15.0;
+            fall_capacitance_range (12.0, 15.0);
+        }
+    }
+
 }
diff --git a/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_stdcell.lef b/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_stdcell.lef
@@ -4524,7 +4524,7 @@ MACRO sg13g2_nand2b_1
   SITE CoreSite ;
   PIN Y
     DIRECTION OUTPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNADIFFAREA 0.6772 LAYER Metal1 ;
     PORT
       LAYER Metal1 ;
@@ -4536,7 +4536,7 @@ MACRO sg13g2_nand2b_1
   END Y
   PIN B
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.2418 LAYER Metal1 ;
     PORT
@@ -4546,7 +4546,7 @@ MACRO sg13g2_nand2b_1
   END B
   PIN A_N
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.1807 LAYER Metal1 ;
     PORT
@@ -5692,7 +5692,7 @@ MACRO sg13g2_or2_1
   END X
   PIN B
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.1807 LAYER Metal1 ;
     PORT
@@ -5703,7 +5703,7 @@ MACRO sg13g2_or2_1
   END B
   PIN A
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.1807 LAYER Metal1 ;
     PORT
@@ -5769,7 +5769,7 @@ MACRO sg13g2_or2_2
   END X
   PIN B
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.1807 LAYER Metal1 ;
     PORT
@@ -5780,7 +5780,7 @@ MACRO sg13g2_or2_2
   END B
   PIN A
     DIRECTION INPUT ;
-    USE ANALOG ;
+    USE SIGNAL ;
     ANTENNAMODEL OXIDE1 ;
       ANTENNAGATEAREA 0.1807 LAYER Metal1 ;
     PORT

diff --git a/ihp-sg13g2/libs.tech/klayout/tech/macros/lvs_options.yml b/ihp-sg13g2/libs.tech/klayout/tech/macros/lvs_options.yml
diff --git a/ihp-sg13g2/libs.tech/ngspice/.spiceinit b/ihp-sg13g2/libs.tech/ngspice/.spiceinit
@@ -8,16 +8,21 @@ setcs sourcepath = (  $sourcepath $PDK_ROOT/$PDK/libs.tech/ngspice/models $PDK_R
 *echo $sourcepath
 
 *option tnom=28
-option list
-option klu
-option node
-option opts
-option warn=1
-option maxwarns=10
-option savecurrents
+*option list
+
+* KLU solver still do not work correctly for every simulation
+*option klu
+
+*option node
+*option opts
+*option warn=1
+*option maxwarns=10
+
+* this option produces error in the AC/SP simulation
+*option savecurrents
 
 set ngbehavior=hsa
-set noinit
+*set noinit
 
 * add OSDI 
 osdi  '$PDK_ROOT/$PDK/libs.tech/ngspice/openvaf/psp103_nqs.osdi'

diff --git a/ihp-sg13g2/libs.tech/xschem/sg13g2_tests/dc_hbt_13g2.sch b/ihp-sg13g2/libs.tech/xschem/sg13g2_tests/dc_hbt_13g2.sch
@@ -7,7 +7,7 @@ S {}
 E {}
 B 2 -280 -540 520 -140 {flags=graph
 
-y2=0.017
+y2=0.0027
 ypos1=0
 ypos2=2
 divy=5
@@ -24,7 +24,7 @@ logx=0
 logy=0
 color=4
 node=i(Vc)
-y1=-0.00023
+y1=-1.9e-05
 rainbow=0}
 T {Nx - number of emitters} -210 110 0 0 0.2 0.2 {}
 N -300 60 -300 80 {
@@ -62,7 +62,7 @@ save all
 op
 print I(Vc)
 reset 
-dc Vce 0 2 0.01 I0 0 5u 0.1u
+dc Vce 0 1.5 0.01 I0 0 5u 0.1u
 write test_npn_13G2.raw
 .endc
 "}