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E Ink Display Testing
Alex J Lennon edited this page Oct 4, 2025
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1 revision
This document outlines the testing approach for the i.MX93 Jaguar E-Ink board's dual chip select routing system, based on hardware engineer feedback about level shifters and the L#R_SEL_DIS signal.
The display interface uses level shifters to convert i.MX93's 1.8V signals to 3.3V for the display:
- Autosensing Direction: Required for reading display registers (can be temperamental)
- Fixed Direction: More reliable but no register read capability
- Recommendation: Start with fixed direction buffers for initial testing
- Display Controllers: Left (CS_M) and Right (CS_S)
- Single CS Line: Only one chip select from i.MX93 SPI controller
-
Routing Control:
L#R_SEL_DIS
signal (GPIO2_IO16) routes CS:-
LOW (0)
→ CS routes to left controller (CS_M) -
HIGH (1)
→ CS routes to right controller (CS_S)
-
Function | GPIO | Number | Signal | Notes |
---|---|---|---|---|
Reset | GPIO2_IO14 | 526 | RES_DIS# | Active-Low |
Data/Command | GPIO2_IO15 | 527 | D/C#_DIS | LO=Cmd, HI=Data |
L/R Select | GPIO2_IO16 | 528 | L#R_SEL_DIS | LO=Left, HI=Right |
Busy Status | GPIO2_IO17 | 529 | BUSY_DIS# | LO=Busy (Input) |
Power Enable | GPIO2_IO11 | 523 | POWER_EN | Display power |
GPIO2 base address: 512 (e.g., GPIO2_IO16 = 512 + 16 = 528)
/* E-Ink Chip Select Routing Control */
eink_cs_routing: eink-cs-routing {
compatible = "gpio-controller";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eink_cs_routing>;
/* L#R_SEL_DIS GPIO control
* LOW (0) = Route CS to left controller (CS_M)
* HIGH (1) = Route CS to right controller (CS_S)
*/
lr-sel-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; /* GPIO2_IO16 */
/* Default to left controller for initial testing */
lr-sel-default = <0>;
};
/* E-Ink chip select routing control */
pinctrl_eink_cs_routing: eink_cs_routing_grp {
fsl,pins = <
MX93_PAD_GPIO_IO16__GPIO2_IO16 0x31e /* L#R_SEL_DIS - Chip Select Routing Control */
>;
};
Created comprehensive test script with:
- Individual Controller Testing: Test left and right controllers separately
- Level Shifter Validation: Test signal integrity on both routing paths
- Rapid Switching Test: Validate routing reliability
- GPIO Management: Proper export/unexport and cleanup
# Set routing to left controller
./scripts/test-eink-cs-routing.sh left
# Set routing to right controller
./scripts/test-eink-cs-routing.sh right
# Run comprehensive test
./scripts/test-eink-cs-routing.sh test
# Clean up GPIO exports
./scripts/test-eink-cs-routing.sh cleanup
- Power On: Verify display power regulator is working
- GPIO Export: Ensure all GPIO pins can be exported and controlled
- SPI Interface: Verify SPI communication is functional
- Signal Integrity: Test GPIO signal transitions on both routing paths
- Direction Detection: Verify autosensing vs fixed direction behavior
- Timing Analysis: Check for signal delays or glitches
-
Left Controller (CS_M):
- Set
L#R_SEL_DIS = LOW
- Attempt SPI communication
- Verify busy signal response
- Set
-
Right Controller (CS_S):
- Set
L#R_SEL_DIS = HIGH
- Attempt SPI communication
- Verify busy signal response
- Set
- Routing Reliability: Test rapid switching between controllers
- Level Shifter Stability: Ensure buffers handle direction changes
- Signal Integrity: Verify no cross-talk or interference
- ✅ Both controllers respond to SPI commands
- ✅ Busy signal changes appropriately for each controller
- ✅ No GPIO export/control errors
- ✅ Clean switching between left and right routing
- ❌ Only one controller responds → Check level shifter configuration
- ❌ Neither controller responds → Check SPI wiring and power
- ❌ GPIO control fails → Check device tree and pinctrl
- ❌ Signal integrity issues → May need autosensing buffers
- Cause: Fixed direction level shifters may not support right controller
- Solution: Switch to autosensing level shifters
- Cause: SPI wiring, power, or level shifter configuration
- Solution: Check power supply, SPI connections, and level shifter enable signals
- Cause: Level shifter timing or signal integrity
- Solution: Add delays, check signal quality, verify power supply stability
- Cause: Device tree configuration or pin conflicts
- Solution: Verify pinctrl settings and check for pin conflicts
- Build and Deploy: Compile device tree changes and deploy to target
- Run Tests: Execute test script to validate chip select routing
- Level Shifter Optimization: Based on results, optimize level shifter configuration
- Display Driver Integration: Once routing is validated, integrate with display driver
- Performance Tuning: Optimize SPI timing and signal integrity
meta-dynamicdevices-bsp/recipes-bsp/device-tree/lmp-device-tree/imx93-jaguar-eink.dts
-
scripts/test-eink-cs-routing.sh
(new) -
docs/EINK_CS_ROUTING_TEST_PLAN.md
(this document)
export TARGET_IP="192.168.1.100" # Target board IP
export TARGET_USER="fio" # Target username
export SPI_DEVICE="/dev/spidev1.0" # SPI device path
Author: Dynamic Devices Ltd
Date: $(date)
License: Creative Commons Non Commercial
Copyright: Dynamic Devices Ltd 2025