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Tpm sci #641

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miczyg1
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@miczyg1 miczyg1 commented Mar 31, 2025

Trying to fix Dasharo/dasharo-issues#1013 one error by one.

For now I haven't noticed the TPM interrupt not working error in dmesg on Ubuntu 24.04 so looks promising. I will apply the same changes for other platforms with SPI TPM if where necessary.

miczyg1 added 4 commits March 31, 2025 15:53
The SoC code requires or GPE DW config values to be different.
Assign the default values of PMC GPIO_CONF register as GPIO GPEs
are not used on this platform. Fixes the assertion in
soc/intel/elkhartalke/pmutil.

TEST=Boot Protectli VP2420 to Ubuntu 24.04.

Upstream-Status: https://review.coreboot.org/c/coreboot/+/87049
Change-Id: Ibf4a1f52bf970c27d0ca8dd1b1377d6a5e6477f9
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Based on the description of PMC GPIO_CONF register from
EHL EDS Vol 2 Book 2 rev 2.3 R&DC #614109.

Some of the groups had incorrect values or even defined
non-existent GPIO groups.

TEST=Boot Protectli VP2420 to Ubuntu 24.04.

Upstream-Status: https://review.coreboot.org/c/coreboot/+/87050
Change-Id: I910f3c4c0d31b8d24b83cd2c3a28688b898b5d9f
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The board uses GPP_G19 as GPIO interrupt for SPI dTPM. The pad
is already configured as APIC interrupt, so simply define the
TPM_PIRQ to GPP_G19_IRQ, which is 0x6B for Elkhart Lake.

TEST=Boot Ubuntu 24.04 and check dmesg that Linux does not
complain on TPM interrupt not working. Check Windows Device
Manager does not report any problem with TPM and its resources.

Upstream-Status: https://review.coreboot.org/c/coreboot/+/87051
Change-Id: Ia23319680cff927f10b44d7a5d07928cc30dbc9d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Modern TPMs do not use legacy I/O access in favor of MMIO access.
Discard the I/O resource, so it is not added to the ACPI _CRS.

TEST=Boot Ubuntu 24.04 and check dmesg that Linux does not
report problems with TPM. Check Windows Device Manager does
not report any problem with TPM and its resources.

Upstream-Status: https://review.coreboot.org/c/coreboot/+/87052
Change-Id: I0e504af6bc7268bc5ecce2e6642ed172ab682726
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
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miczyg1 commented Mar 31, 2025

The branch name is a bit awkward, because I though about configuring this GPIO pin as SCI. But now that I don't see the error anymore, I don't see any reason to do so.

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