Accelerate ASE inference: real-arithmetic rewrite, CUDA graphs, fused Triton kernels - #13
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…s path Replace complex MPS contractions, quantum updates, scalarization and rope with mathematically equivalent real-arithmetic forms (same checkpoints, fp64 outputs bit-identical). Stress/NPT now reuses the cached neighbor topology via a conservative cell-deformation rebuild criterion.
…tress Masked static shapes keep every cached edge (fp64-identical to filtering); whole-step CUDA graphs refresh topology buffers on rebuild without recapture. Sticky stress serves an optimizer's E/F/S property calls with one pass.
Inference-only fp32 kernels keep per-edge intermediates in registers; training, fp64 and non-CUDA environments fall back to the reference path.
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Rewrite complex-valued MPS contractions as equivalent real arithmetic, add whole-step CUDA graph capture with automatic path selection, cache neighbor topology for the stress path, and fuse hot per-edge operations into Triton kernels with fallback to the reference path.