feat(boards): Add Nucleo WB55CG dongle.

app/boards/arm/nucleo_wb55cg_dongle/Kconfig.board

@@ -0,0 +1,8 @@
+# STM32WB55CG Nucleo USB dongle configuration
+
+# Copyright (c) 2021 The ZMK Contributors
+# SPDX-License-Identifier: MIT
+
+config BOARD_NUCLEO_WB55CG_DONGLE
+	bool "Nucleo WB55CG USB Dongle"
+	depends on SOC_STM32WB55XX

app/boards/arm/nucleo_wb55cg_dongle/Kconfig.defconfig

@@ -0,0 +1,33 @@
+# STM32LWB55CG USB dongle configuration
+
+# Copyright (c) 2021 The ZMK Contributors
+# SPDX-License-Identifier: MIT
+
+if BOARD_NUCLEO_WB55CG_DONGLE
+
+config BOARD
+	default "nucleo_wb55cg_dongle"
+
+config CLOCK_STM32_LSE
+	default y
+
+choice STM32_LPTIM_CLOCK
+	default STM32_LPTIM_CLOCK_LSE
+	depends on STM32_LPTIM_TIMER
+endchoice
+
+choice BT_HCI_BUS_TYPE
+	default BT_STM32_IPM
+	depends on BT
+endchoice
+
+config SYSTEM_WORKQUEUE_STACK_SIZE
+	default 2048
+
+config ZMK_USB
+	default y
+
+config ZMK_KSCAN_MATRIX_POLLING
+	default y
+
+endif # BOARD_NUCLEO_WB55CG

app/boards/arm/nucleo_wb55cg_dongle/README.md

@@ -0,0 +1,10 @@
+# Nucleo WB55CG dongle support for [Zephirum](http://zephirum.tuxfamily.org)
+
+Zephirum is an ergo monoblock angled keyboards powered by a Nucleo
+WB55CG USB dongle.
+
+## Building ZMK firmware
+
+```
+west build -b nucleo_wb55cg_dongle -- -DSHIELD=zephirum
+```

app/boards/arm/nucleo_wb55cg_dongle/board.cmake

@@ -0,0 +1,6 @@
+# Copyright (c) 2021 The ZMK Contributors
+# SPDX-License-Identifier: MIT
+
+board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse")
+
+include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)

app/boards/arm/nucleo_wb55cg_dongle/nucleo_wb55cg_dongle.dts

@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2021 The ZMK Contributors
+ * SPDX-License-Identifier: MIT
+ */
+
+/dts-v1/;
+#include <st/wb/stm32wb55Xg.dtsi>
+#include <st/wb/stm32wb55cgux-pinctrl.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32WB55CG USB dongle";
+	compatible = "st,stm32wb55cg-dongle";
+
+	chosen {
+		zephyr,bt-mon-uart = &lpuart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		blue_led_1: led_0 {
+			gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>;
+			label = "D1";
+		};
+		green_led_2: led_1 {
+			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
+			label = "D2";
+		};
+		red_led_3: led_2 {
+			gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
+			label = "D3";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button_1: button_0 {
+			label = "SW1";
+			gpios = <&gpioa 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+		};
+	};
+
+	aliases {
+		led0 = &blue_led_1;
+		led1 = &green_led_2;
+		led2 = &red_led_3;
+		sw0 = &user_button_1;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
+};
+
+&rtc {
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
+	status = "okay";
+};
+
+&timers2 {
+	status = "okay";
+	pwm2: pwm {
+		status = "okay";
+		pinctrl-0 = <&tim2_ch1_pa0>;
+	};
+};
+
+&lpuart1 {
+	pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&adc1 {
+	pinctrl-0 = <&adc1_in6_pa1>;
+	status = "okay";
+};
+
+&iwdg {
+	status = "okay";
+};
+
+&lptim1 {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
+};
+
+&flash0 {
+	/*
+	 * For more information, see:
+	 * http://docs.zephyrproject.org/latest/devices/dts/flash_partitions.html
+	 */
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Set all partitions with first 812K of flash */
+		/* last 212K are reseved for M0 usage */
+		/* Configure partitions to make use of the whole 812K */
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0xc000>;
+		};
+		slot0_partition: partition@c000 {
+			label = "image-0";
+			reg = <0x0000C000 0x5c000>;
+		};
+		slot1_partition: partition@68000 {
+			label = "image-1";
+			reg = <0x00068000 0x5c000>;
+		};
+		scratch_partition: partition@c4000 {
+			label = "image-scratch";
+			reg = <0x000c4000 0x4000>;
+		};
+		storage_partition: partition@c8000 {
+			label = "storage";
+			reg = <0x000c8000 0x3000>;
+		};
+
+	};
+};

app/boards/arm/nucleo_wb55cg_dongle/nucleo_wb55cg_dongle.yaml

@@ -0,0 +1,19 @@
+identifier: nucleo_wb55cg_dongle
+name: ST Nucleo WB55CG Dongle
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 96
+flash: 1024
+supported:
+  - gpio
+  - i2c
+  - counter
+  - spi
+  - pwm
+  - adc
+  - watchdog
+  - usb_device

app/boards/arm/nucleo_wb55cg_dongle/nucleo_wb55cg_dongle.zmk.yml

@@ -0,0 +1,9 @@
+file_format: "1"
+id: nucleo_wb55cg_dongle
+name: ST Nucleo WB55CG Dongle
+type: board
+arch: arm
+outputs:
+  - usb
+url: https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html
+exposes: [nucleo_wb55cg_dongle]

app/boards/arm/nucleo_wb55cg_dongle/nucleo_wb55cg_dongle_defconfig

@@ -0,0 +1,26 @@
+CONFIG_SOC_SERIES_STM32WBX=y
+CONFIG_SOC_STM32WB55XX=y
+# 32MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+# SYSCLK selection
+# CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+CONFIG_CLOCK_STM32_SYSCLK_SRC_HSE=y
+CONFIG_CLOCK_STM32_HSE_CLOCK=32000000
+
+CONFIG_CLOCK_STM32_CPU1_PRESCALER=1
+CONFIG_CLOCK_STM32_CPU2_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=1
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1
+CONFIG_CLOCK_STM32_AHB4_PRESCALER=1
+
+# Enable MPU
+CONFIG_ARM_MPU=y