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Add rp2040 zero #1871
Add rp2040 zero #1871
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# Copyright (c) 2023 The ZMK Contributors | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config BOARD_WAVESHARE_RP2040_ZERO | ||
bool "Waveshare RP2040 Zero Board" | ||
depends on SOC_RP2040 |
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# Copyright (c) 2023 The ZMK Contributors | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if BOARD_WAVESHARE_RP2040_ZERO | ||
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config BOARD | ||
default "waveshare_rp2040_zero" | ||
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config RP2_FLASH_W25Q080 | ||
default y | ||
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config ZMK_USB | ||
default y | ||
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endif # BOARD_WAVESHARE_RP2040_ZERO |
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/* | ||
* Copyright (c) 2023 The ZMK Contributors | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h> | ||
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&pinctrl { | ||
uart1_default: uart0_default { | ||
group1 { | ||
pinmux = <UART1_TX_P20>; | ||
}; | ||
group2 { | ||
pinmux = <UART1_RX_P5>; | ||
input-enable; | ||
}; | ||
}; | ||
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i2c1_default: i2c1_default { | ||
group1 { | ||
pinmux = <I2C1_SDA_P22>, <I2C1_SCL_P23>; | ||
input-enable; | ||
input-schmitt-enable; | ||
}; | ||
}; | ||
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spi0_default: spi0_default { | ||
group1 { | ||
pinmux = <SPI0_TX_P3>, <SPI0_SCK_P6>; | ||
}; | ||
group2 { | ||
pinmux = <SPI0_RX_P4>; | ||
input-enable; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Copyright (c) 2023 The ZMK Contributors | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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/dts-v1/; | ||
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#include <rpi_pico/rp2040.dtsi> | ||
#include "waveshare_rp2040_zero-pinctrl.dtsi" | ||
#include <freq.h> | ||
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/ { | ||
chosen { | ||
zephyr,sram = &sram0; | ||
zephyr,flash = &flash0; | ||
zephyr,console = &uart0; | ||
zephyr,code-partition = &code_partition; | ||
}; | ||
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xtal_clk: xtal-clk { | ||
compatible = "fixed-clock"; | ||
clock-frequency = <12000000>; | ||
#clock-cells = <0>; | ||
}; | ||
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}; | ||
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&flash0 { | ||
/* 2MB of flash minus the 0x100 used for | ||
* the second stage bootloader | ||
*/ | ||
reg = <0x10000000 DT_SIZE_M(2)>; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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/* | ||
* Start at the beginning of usable flash, 8MB minus the | ||
* second stage space and the 16 KiB reserved for settings | ||
*/ | ||
code_partition: partition@100 { | ||
label = "code"; | ||
reg = <0x100 (DT_SIZE_M(2) - DT_SIZE_K(16))>; | ||
read-only; | ||
}; | ||
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/* | ||
* The final 16 KiB is reserved for the application. | ||
* Storage partition may be used by FCB or LittleFS. | ||
*/ | ||
storage_partition: partition@7fbe00 { | ||
label = "storage"; | ||
reg = <0x007fbe00 DT_SIZE_K(16)>; | ||
}; | ||
}; | ||
}; | ||
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&uart1 { | ||
current-speed = <115200>; | ||
status = "okay"; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. For ZMK boards, don't enable the UART, SPI, etc by default. This is a bit different from the upstream Zephyr board approach. |
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pinctrl-0 = <&uart1_default>; | ||
pinctrl-names = "default"; | ||
}; | ||
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&spi0 { | ||
status = "okay"; | ||
pinctrl-0 = <&spi0_default>; | ||
pinctrl-names = "default"; | ||
clock-frequency = <DT_FREQ_M(2)>; | ||
}; | ||
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&i2c1 { | ||
status = "okay"; | ||
pinctrl-0 = <&i2c1_default>; | ||
pinctrl-names = "default"; | ||
clock-frequency = <I2C_BITRATE_FAST>; | ||
}; | ||
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&gpio0 { | ||
status = "okay"; | ||
}; | ||
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zephyr_udc0: &usbd { | ||
status = "okay"; | ||
}; |
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identifier: waveshare_rp2040_zero | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. This |
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name: RP2040-Zero | ||
type: mcu | ||
arch: arm | ||
flash: 2048 | ||
ram: 264 | ||
toolchain: | ||
- zephyr | ||
- gnuarmemb | ||
- xtools | ||
supported: | ||
- serial |
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# Copyright (c) 2023 The ZMK Contributors | ||||||
# SPDX-License-Identifier: Apache-2.0 | ||||||
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CONFIG_SOC_SERIES_RP2XXX=y | ||||||
CONFIG_SOC_RP2040=y | ||||||
CONFIG_BOARD_WAVESHARE_RP2040_ZERO=y | ||||||
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000 | ||||||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
Suggested change
I had to fix this in our other boards recently, they had the wrong sys clock frequency set. |
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# Enable GPIO | ||||||
CONFIG_GPIO=y | ||||||
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# enable uart driver | ||||||
CONFIG_SERIAL=n | ||||||
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# enable console | ||||||
CONFIG_CONSOLE=y | ||||||
CONFIG_UART_CONSOLE=y | ||||||
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# Code partition needed to target the correct flash range | ||||||
CONFIG_USE_DT_CODE_PARTITION=y | ||||||
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# Output UF2 by default, native bootloader supports it. | ||||||
CONFIG_BUILD_OUTPUT_UF2=y |
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For boards added to ZMK directly, we usually set the console to be the CDC ACM node added to the usb node. See https://github.com/zmkfirmware/zmk/blob/main/app/boards/arm/nice_nano/nice_nano.dtsi#L64 for an example node.