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@cvinayak cvinayak commented Dec 25, 2024

Align DDPI usage with nRF54L series power domains and
available DDPI configurations.

Use indices below 4 when needing to bridge with GPIO,
use indices below 8 when needing to bridge with MCU domain
like CCM and AAR; and use indices above 7 to bridge with
Peripheral domain.

Replace use of HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI with
HAL_TRIGGER_CRYPT_PPI; they have same value but use the
correctly named HAL_TRIGGER_CRYPT_PPI define now.

Fix conditional compile to correctly exclude reference of
NRF_CCM when CONFIG_BT_CTLR_PRIVACY=n.

Fix missing reference to CCM_TASKS_CRYPT_DELAY_BITS when
CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER=y.

Replace use of HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI with
HAL_TRIGGER_CRYPT_PPI; they have same value but use the
correctly named HAL_TRIGGER_CRYPT_PPI define now.

Fix conditional compile to correctly exclude reference of
NRF_CCM when CONFIG_BT_CTLR_PRIVACY=n.

Fix missing reference to CCM_TASKS_CRYPT_DELAY_BITS when
CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER=y.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Align DDPI usage with nRF54L series power domains and
available DDPI configurations.

Use indices below 4 when needing to bridge with GPIO,
use indices below 8 when needing to bridge with MCU domain
like CCM and AAR; and use indices above 7 to bridge with
Peripheral domain.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
@cvinayak cvinayak force-pushed the github_align_dppi_indices branch from 92ecc32 to 9e9d5e2 Compare December 25, 2024 06:19
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cvinayak commented Jan 3, 2025

Superceded by #83394

@cvinayak cvinayak closed this Jan 3, 2025
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