drivers: serial: stm32u5: Serial wakeup is based on autonomous capability #65532
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…lity On some devices such as STM32U5, there is no UART WKUP dedicated registers as the hardware block has an integrated autonomous wakeup capability. Hence it's capable to wake up the device from stop modes (down to Stop 1). This behavior relies on RCC UESM bit which is enabled by default at reset and not modified today in drivers. Since driver will not compile otherwise, remain in this simple configuration. This might be changed later on, if a need is seen to disable UESM bit. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add a sample overlay for b_u585i_iot02a Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
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@henrikbrixandersen This is fixing a compilation issue that might be seen in CI |
fabiobaltieri
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Nov 21, 2023
samples/boards/stm32/power_mgmt/serial_wakeup/boards/b_u585i_iot02a.overlay
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henrikbrixandersen
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Nov 21, 2023
bperseghetti
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dleach02
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Nov 21, 2023
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Do we have insight into how the current build failure was introduced and not caught by CI? ping: @nashif, @stephanosio |
prob the same testplan shortcomings that Anas is working on addressing in #65257 |
This was referenced Nov 21, 2023
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On some devices such as STM32U5, there is no UART WKUP dedicated registers as the hardware block has an integrated autonomous wakeup capability. Hence it's capable to wake up the device from stop modes (down to Stop 1).
This behavior relies on RCC UESM bit which is enabled by default at reset and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple configuration. This might be changed later on, if a need is seen to disable UESM bit.