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drivers: regulator: Add NXP VREF driver #56822

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merged 4 commits into from
Sep 21, 2023
Merged

drivers: regulator: Add NXP VREF driver #56822

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bdf130e
drivers: regulator: Add NXP VREF driver
decsny Mar 28, 2023
b7a2a24
soc: lpc55s3x: Enable VREF
decsny Apr 12, 2023
50c7147
dts: bindings: lpadc: Add regulator phandle prop
decsny Apr 12, 2023
0b98a62
tests: regulator voltage: Support LPC55S36 board
decsny Jul 6, 2023
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soc: lpc55s3x: Enable VREF 
Add node for VREF0 peripheral to LPC55S3X SOC DT

Clock VREF peripheral if status = okay in DT

Enable VREF on lpcxpresso55s36

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
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@decsny
decsny committed Sep 19, 2023
commit b7a2a2407a24566990c5422e5e7c14f970beb761
4 changes: 4 additions & 0 deletions boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts
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Expand Up @@ -176,6 +176,10 @@ zephyr_udc0: &usbfs {
status = "okay";
};

&vref0 {
status = "okay";
};

&dac0 {
status = "okay";
pinctrl-0 = <&pinmux_dac0>;
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9 changes: 9 additions & 0 deletions dts/arm/nxp/nxp_lpc55S3x_common.dtsi
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Expand Up @@ -462,6 +462,15 @@
prescaler = <2>;
#pwm-cells = <3>;
};

vref0: vref@b5000 {
compatible = "nxp,vref";
regulator-name = "lpc55s36-vref";
reg = <0xb5000 0x30>;
status = "disabled";
nxp,buffer-startup-delay-us = <400>;
nxp,bandgap-startup-time-us = <20>;
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};
};

&nvic {
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32 changes: 12 additions & 20 deletions soc/arm/nxp_lpc/lpc55xxx/soc.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
/*
* Copyright 2017, 2019-2023 NXP
/* Copyright 2017, 2019-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand Down Expand Up @@ -323,38 +322,31 @@ DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
#if defined(CONFIG_SOC_LPC55S36)
CLOCK_SetClkDiv(kCLOCK_DivAdc0Clk, 2U, true);
CLOCK_AttachClk(kFRO_HF_to_ADC0);
#else
#else /* not LPC55s36 */
CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk,
DT_PROP(DT_NODELABEL(adc0), clk_divider), true);
CLOCK_AttachClk(MUX_A(CM_ADCASYNCCLKSEL, DT_PROP(DT_NODELABEL(adc0), clk_source)));

/* Power up the ADC */
POWER_DisablePD(kPDRUNCFG_PD_LDOGPADC);
#endif
#endif
#endif /* SOC platform */
#endif /* ADC */

#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(vref0), nxp_vref, okay))
CLOCK_EnableClock(kCLOCK_Vref);
POWER_DisablePD(kPDRUNCFG_PD_VREF);
#endif /* vref0 */
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(dac0), nxp_lpdac, okay)
#if defined(CONFIG_SOC_LPC55S36)
CLOCK_SetClkDiv(kCLOCK_DivDac0Clk, 1U, true);
CLOCK_AttachClk(kMAIN_CLK_to_DAC0);

/* Disable DAC0 power down */
POWER_DisablePD(kPDRUNCFG_PD_DAC0);
#endif
#endif
#if defined(CONFIG_SOC_LPC55S36)
#if (defined(CONFIG_ADC_MCUX_LPADC) || defined(CONFIG_DAC_MCUX_LPDAC))
/* Vref is required for LPADC reference */
POWER_DisablePD(kPDRUNCFG_PD_VREF);
#endif /* SOC platform */
#endif /* DAC */

vref_config_t vrefConfig;

VREF_GetDefaultConfig(&vrefConfig);
vrefConfig.bufferMode = kVREF_ModeHighPowerBuffer;
vrefConfig.enableInternalVoltageRegulator = true;
vrefConfig.enableVrefOut = true;
VREF_Init((VREF_Type *)VREF_BASE, &vrefConfig);
#endif
#endif
}

/**
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