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@vaussard vaussard commented Dec 22, 2017

This patchset performs the following tasks:

  • Ease device registration by using a macro to factorize common code
  • Add support for more PWM devices
  • Replace hardcoded prescalers by Kconfigs

Fixes #6625

@vaussard vaussard requested a review from erwango as a code owner December 22, 2017 08:28
@galak galak added the platform: STM32 ST Micro STM32 label Jan 9, 2018
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LGTM for user selectable prescaler.

Code concatenation should be reworked to take F0 into account.

@pfalcon pfalcon requested review from mbolivar and ydamigos January 11, 2018 11:46
@galak galak force-pushed the arm branch 2 times, most recently from ee5b12f to f95e5fd Compare January 11, 2018 22:07
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Approach in the last 3 patches looks sane -- seems like this needs a rebase though

@galak galak added the area: ARM ARM (32-bit) Architecture label Jan 13, 2018
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Hi @mbolivar and @erwango, thanks for the review!

@erwango : The current driver does not seem to have F0-specific bits. Do you want me to port this driver to F0? I do not have such a board around to test. I can add the necessary part if you tell me what to look for. Is the clock name different on F0 ?

@mbolivar : Rebase done.

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codecov-io commented Jan 15, 2018

Codecov Report

Merging #5469 into master will not change coverage.
The diff coverage is n/a.

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@@           Coverage Diff           @@
##           master    #5469   +/-   ##
=======================================
  Coverage   55.03%   55.03%           
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  Files         483      483           
  Lines       53965    53965           
  Branches    10489    10489           
=======================================
  Hits        29697    29697           
  Misses      19992    19992           
  Partials     4276     4276

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erwango commented Jan 15, 2018

@vaussard : You don't need to develop PWM for F0, but considering this is an exception to the rule you used to factorize code. I'd like it to be taken into account from the start.
F0: #define LL_APB1_GRP2_PERIPH_TIM1 (same for 15/16/17)
F1/F3/...: #define LL_APB2_GRP1_PERIPH_TIM1 (same for 8/9/10/11/15/16/17)

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Ok @erwango, so I will add a new patch to support F0 and see if nucleo_f091rc and alike compile. I won't be able to test however. Would it be acceptable for you?

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erwango commented Jan 15, 2018

@vaussard : Yes, of course. You can mention in your commit message that minimum is done on F0 to compile but feature should not be considered as available on F0 until futher dev/test.

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Hi @erwango, I addressed your comments (and even more):

  • Added all the PWM up to 20 as I realized that some MCUs can have them
  • Added the STM32F0-specific clocks
  • Fixed the compilation of the PWM driver on STMF3 and nucleo_f334r8

@galak galak force-pushed the arm branch 2 times, most recently from 6b38c09 to ff730a4 Compare January 23, 2018 14:54
dbkinder
dbkinder previously approved these changes Jan 26, 2018
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+1 for docs

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I just rebased due to forced changes in the arm branch.
Sorry @dbkinder could you tell me where you would like to see more docs? Github does not allow me anymore to see the location of your comment due to the rebase.

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Could you move commit 8caa2cf3ffbe7c0229b3baed1fc0fd076281fc5f before commit 1aedb4e54e669df869e8cc0c31485b6542c4deb8 and squash commits 1aedb4e54e669df869e8cc0c31485b6542c4deb8 with bc0db4de0ea839431dd713a266dc2cda7f2a2cd0 and aad0b8dc0ca2d8f73f6aedb89d285cd92517ceb7 with 8caa2cf3ffbe7c0229b3baed1fc0fd076281fc5f?

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Hi @ydamigos. These patches were done later and the only reason that I did not squashed 1aedb4e and bc0db4d was to avoid facing a huge amount of conflicts. But I will do that if you insist :-)
But I am not sure about moving 8caa2cf before commit 1aedb4e, because it is more related to the STM32F0 changes that are done in bde95a9.

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@vaussard My comments are not blocking. IMO, the proposed changes make the PR easier to check.

But I am not sure about moving 8caa2cf before commit 1aedb4e, because it is more related to the STM32F0 changes that are done in bde95a9.

In that case, I would move both 8caa2cf and bde95a9 before 1aedb4e.

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@ydamigos Moving 8caa2cf and bde95a9 before 1aedb4e will force me to rewrite almost all the patches due to the conflicts. IMHO such ordering would be acceptable:

  1. Convert to use a macro
  2. Add all PWM up to PWM20
  3. Use Kconfig for prescalers
  4. Add clock group
  5. Add STM32F0 bits

It boils down to enhancing-before-extending or extending-before-enhancing. I am OK with both but one is more work to rewrite.

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Convert to use a macro
Add all PWM up to PWM20
Use Kconfig for prescalers
Add clock group
Add STM32F0 bits

@vaussard Sounds good.

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Not sure now what docs were updated that I reviewed before the rebase... the API material will update automatically if the header files changed (http://docs.zephyrproject.org/api/io_interfaces.html#pwm-interface). Might be worth looking through the PWM samples docs (http://docs.zephyrproject.org/samples/basic/basic.html) to see if they're still OK or if a new sample would be useful.

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jli157 commented May 24, 2018

@vaussard Nice job! Hopefully this PR can be merged as soon as possible!

@vaussard vaussard force-pushed the stm32_enhance_pwm branch from 8033989 to e638508 Compare May 25, 2018 12:34
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Nice job! Hopefully this PR can be merged as soon as possible!

Hi @jli157, thank you. I hope also that this PR can be merged soon, presumably after the freeze window.

recheck

Hi @erwango, I rebased on master and CI succeeded. It looks like all lights are green for merging.

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erwango commented May 25, 2018

@galak : Can you check then?

vaussard and others added 16 commits May 25, 2018 13:08
The registration of each PWM differs only by a few details.
These differences can be factorized in order to create a generic
registration macro.

This has several advantages:
- Less code
- Easier to add new PWM

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
All the PWM between 1 and 20 can be found on the STM32 depending on the
serie and the specific model. Add all the missing PWMs up to PWM20 to
plan for the future needs.

Tested on STM32L496 with available PWMs.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
The prescalers are currently hardcoded and are not user-selectable. As a
result, the frequency of the timer can be inadequate to the task. For
instance, the frequency of the 16-bit timers (prescaler 10000) is
usually too low to correctly generate of PWM of a few kilohertz.

Hardcoded prescalers are replaced by Kconfigs so the user can choose at
compile time. The default value of each Kconfig matches the hardcoded
prescaler, so the change will be transparent.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Not all PWM clocks belong to the GRP1, for example TIM1 on STM32F0. Add
the group information to the macro to enable supporting these PWMs in
the future.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
PWM1 / PWM15 / PWM16 and PWM17 on STM32F0 do not use the same clocks
compared to the other series.

Add the STM32F0-specific clocks where needed.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
CONFIG_CLOCK_STM32_APB2_PRESCALER does not exist for STM32F0 as it was
removed from the RCC Kconfig by commit d067820 ("drivers:
clock_control: provide support for stm32f0."). This will break the PWM
driver if compiled for STM32F0.

Conditionally disable usage of this symbol for STM32F0 as all PWMs are
on APB1 for this family.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
The nucleo_f334r8 uses STM32F3_PINMUX_FUNC_PA8_PWM1_CH1 inside its
pinmux but it is not defined anywhere.

Add the definition into the pinmux file to fix the build of
nucleo_f334r8 when enabling CONFIG_PWM.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
In some cases, node label could be generated with "/" character
in name string, which prevents compilation

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add new device tree bindings for STM32 Timer and PWM IPs.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add available PWM nodes to the existing STM32F0 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add available PWM nodes to the existing STM32F1 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add available PWM nodes to the existing STM32F3 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add available PWM nodes to the existing STM32F4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add available PWM nodes to the existing STM32L4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Enable the PWM nodes for the board already using them in their pinmux.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Add fixup info for PWM nodes on STM32F0/F1/F3/F4/L4 and remove the
conflicting Kconfig symbols to fully switch STM32 PWM to device tree.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
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It seems like we need to update various stm32 board.yaml files to say we support PWM.

Update various stm32 board yaml files to add pwm as a supported feature
of the board.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
@galak galak force-pushed the stm32_enhance_pwm branch from e638508 to a8f946b Compare May 25, 2018 18:35
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It seems like we need to update various stm32 board.yaml files to say we support PWM.

Thank you @galak for the update.

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jli157 commented May 29, 2018

Is anything still blocking this PR from being merged? I'm looking forward to using some new things from this PR. Thank you very much!

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I guess that new features should not be merged before Zephyr 1.12 is released.

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jli157 commented Jun 11, 2018

Waiting for this one to be merged. Thanks!

@galak galak merged commit 558eac2 into zephyrproject-rtos:master Jun 12, 2018
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