boards: arm: add Seeed XIAO BLE board

boards/arm/xiao_ble/Kconfig

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+# XIAO BLE board configuration
+
+# Copyright (c) 2022 Marcin Niestroj
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XIAO_BLE
+
+config BOARD_ENABLE_DCDC
+	bool "DCDC mode"
+	select SOC_DCDC_NRF52X
+	default y
+
+config BOARD_ENABLE_DCDC_HV
+	bool "High Voltage DCDC converter"
+	select SOC_DCDC_NRF52X_HV
+	default y
+
+endif # BOARD_XIAO_BLE

boards/arm/xiao_ble/Kconfig.board

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+# XIAO BLE board configuration
+
+# Copyright (c) 2022 Marcin Niestroj
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XIAO_BLE
+	bool "XIAO BLE"
+	depends on SOC_NRF52840_QIAA

boards/arm/xiao_ble/Kconfig.defconfig

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+# XIAO BLE board configuration
+
+# Copyright (c) 2022 Marcin Niestroj
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XIAO_BLE
+
+config BOARD
+	default "xiao_ble"
+
+config BT_CTLR
+	default BT
+
+endif # BOARD_XIAO_BLE
+
+if USB_DEVICE_STACK
+
+config UART_CONSOLE
+	default CONSOLE
+
+config USB_DEVICE_INITIALIZE_AT_BOOT
+	default y
+
+endif # USB_DEVICE_STACK

boards/arm/xiao_ble/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(nrfjprog "--nrf-family=NRF52")
+board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
+board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/arm/xiao_ble/doc/index.rst

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+.. _xiao_ble:
+
+XIAO BLE
+########
+
+Overview
+********
+
+The Seeed XIAO BLE is a tiny (21 mm x 17.5 mm) Nordic Semiconductor nRF52840 ARM
+Cortex-M4F development board with onboard LEDs, USB port, QSPI flash, battery
+charger, and range of I/O broken out into 14 pins.
+
+.. figure:: img/xiao_ble.png
+     :width: 300px
+     :align: center
+     :alt: XIAO BLE
+
+Hardware
+********
+
+- Nordic nRF52840 Cortex-M4F processor at 64MHz
+- 2MB QSPI Flash
+- RGB LED
+- USB Type-C Connector, nRF52840 acting as USB device
+- Battery charger BQ25101
+- Reset button
+- Bluetooth antenna
+
+Supported Features
+==================
+
+The xiao_ble board configuration supports the following hardware features:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| ADC       | on-chip    | adc                  |
++-----------+------------+----------------------+
+| CLOCK     | on-chip    | clock_control        |
++-----------+------------+----------------------+
+| FLASH     | on-chip    | flash, QSPI flash    |
++-----------+------------+----------------------+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| I2C(M)    | on-chip    | i2c                  |
++-----------+------------+----------------------+
+| MPU       | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| PWM       | on-chip    | pwm                  |
++-----------+------------+----------------------+
+| RADIO     | on-chip    | Bluetooth,           |
+|           |            | ieee802154           |
++-----------+------------+----------------------+
+| RTC       | on-chip    | system clock         |
++-----------+------------+----------------------+
+| SPI(M/S)  | on-chip    | spi                  |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| USB       | on-chip    | usb                  |
++-----------+------------+----------------------+
+| WDT       | on-chip    | watchdog             |
++-----------+------------+----------------------+
+
+Other hardware features have not been enabled yet for this board.
+
+Connections and IOs
+===================
+
+The `XIAO BLE wiki`_ has detailed information about the board including
+`pinouts`_ and the `schematic`_.
+
+LED
+---
+
+* LED1 (red) = P0.26
+* LED2 (green) = P0.30
+* LED3 (blue) = P0.06
+
+Programming and Debugging
+*************************
+
+The XIAO BLE ships with the `Adafruit nRF52 Bootloader`_ which supports flashing
+using `UF2`_. Doing so allows easy flashing of new images, but does not support
+debugging the device. For debugging please use `External Debugger`_.
+
+UF2 Flashing
+============
+
+To enter the bootloader, connect the USB port of the XIAO BLE to your host, and
+double tap the reset botton to the left of the USB connector. A mass storage
+device named `XIAO BLE` should appear on the host. Using the command line, or
+your file manager copy the `zephyr/zephyr.uf2` file from your build to the base
+of the `XIAO BLE` mass storage device. The XIAO BLE will automatically reset
+and launch the newly flashed application.
+
+External Debugger
+=================
+
+In order to support debugging the device, instead of using the bootloader, you
+can use an :ref:`External Debug Probe <debug-probes>`. To flash and debug Zephyr
+applications you need to use `Seeeduino XIAO Expansion Board`_ or solder an SWD
+header onto the back side of the board.
+
+For Segger J-Link debug probes, follow the instructions in the
+:ref:`jlink-external-debug-probe` page to install and configure all the
+necessary software.
+
+Flashing
+--------
+
+Follow the instructions in the :ref:`jlink-external-debug-probe` page to install
+and configure all the necessary software. Then build and flash applications as
+usual (see :ref:`build_an_application` and :ref:`application_run` for more
+details).
+
+Here is an example for the :ref:`hello_world` application.
+
+First, run your favorite terminal program to listen for output.
+
+.. code-block:: console
+
+   $ minicom -D <tty_device> -b 115200
+
+Replace :code:`<tty_device>` with the port where the board XIAO BLE
+can be found. For example, under Linux, :code:`/dev/ttyACM0`.
+
+Then build and flash the application in the usual way. Just add
+``CONFIG_BOOT_DELAY=5000`` to the configuration, so that USB CDC ACM is
+initialized before any text is printed, as below:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: xiao_ble
+   :goals: build flash
+   :gen-args: -DCONFIG_BOOT_DELAY=5000
+
+Debugging
+---------
+
+Refer to the :ref:`jlink-external-debug-probe` page to learn about debugging
+boards with a Segger IC.
+
+Testing the LEDs in the XIAO BLE
+********************************
+
+There is a sample that allows to test that LEDs on the board are working
+properly with Zephyr:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: xiao_ble
+   :goals: build flash
+
+You can build and flash the examples to make sure Zephyr is running correctly on
+your board. The LED definitions can be found in
+:zephyr_file:`boards/arm/xiao_ble/xiao_ble.dts`.
+
+Testing shell over USB in the XIAO BLE
+**************************************
+
+There is a sample that allows to test shell interface over USB CDC ACM interface
+with Zephyr:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/subsys/shell/shell_module
+   :board: xiao_ble
+   :goals: build flash
+
+References
+**********
+
+.. target-notes::
+
+.. _XIAO BLE wiki: https://wiki.seeedstudio.com/XIAO_BLE/
+.. _pinouts: https://wiki.seeedstudio.com/XIAO_BLE/#hardware-overview
+.. _schematic: https://wiki.seeedstudio.com/XIAO_BLE/#resources
+.. _Seeeduino XIAO Expansion Board: https://wiki.seeedstudio.com/Seeeduino-XIAO-Expansion-Board/
+.. _Adafruit nRF52 Bootloader: https://github.com/adafruit/Adafruit_nRF52_Bootloader
+.. _UF2: https://github.com/microsoft/uf2

boards/arm/xiao_ble/pre_dt_board.cmake

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+# Copyright (c) 2022 Nordic Semiconductor
+# SPDX-License-Identifier: Apache-2.0
+
+# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
+# - power@40000000 & clock@40000000 & bprot@40000000
+# - acl@4001e000 & flash-controller@4001e000
+list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

boards/arm/xiao_ble/seeed_xiao_connector.dtsi

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+/*
+ * Copyright (c) 2022 Peter Johanson
+ * Copyright (c) 2022 Marcin Niestroj
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	xiao_d: connector {
+		compatible = "seeed,xiao-gpio";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map
+			= <0 0 &gpio0 2 0>		/* D0 */
+			, <1 0 &gpio0 3 0>		/* D1 */
+			, <2 0 &gpio0 28 0>		/* D2 */
+			, <3 0 &gpio0 29 0>		/* D3 */
+			, <4 0 &gpio0 4 0>		/* D4 */
+			, <5 0 &gpio0 5 0>		/* D5 */
+			, <6 0 &gpio1 11 0>		/* D6 */
+			, <7 0 &gpio1 12 0>		/* D7 */
+			, <8 0 &gpio1 13 0>		/* D8 */
+			, <9 0 &gpio1 14 0>		/* D9 */
+			, <10 0 &gpio1 15 0>		/* D10 */
+			;
+	};
+};
+
+xiao_spi: &spi0 {};
+xiao_i2c: &i2c1 {};
+xiao_serial: &uart0 {};

boards/arm/xiao_ble/xiao_ble-pinctrl.dtsi

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+/*
+ * Copyright (c) 2022 Marcin Niestroj
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 11)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 1, 12)>;
+			bias-pull-up;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 11)>,
+				<NRF_PSEL(UART_RX, 1, 12)>;
+			low-power-enable;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
+				<NRF_PSEL(TWIM_SCL, 0, 5)>;
+		};
+	};
+
+	i2c1_sleep: i2c1_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
+				<NRF_PSEL(TWIM_SCL, 0, 5)>;
+			low-power-enable;
+		};
+	};
+
+	pwm0_default: pwm0_default {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
+			nordic,invert;
+		};
+	};
+
+	pwm0_sleep: pwm0_sleep {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
+			low-power-enable;
+		};
+	};
+
+	spi0_default: spi0_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
+				<NRF_PSEL(SPIM_MOSI, 1, 15)>,
+				<NRF_PSEL(SPIM_MISO, 1, 14)>;
+		};
+	};
+
+	spi0_sleep: spi0_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
+				<NRF_PSEL(SPIM_MOSI, 1, 15)>,
+				<NRF_PSEL(SPIM_MISO, 1, 14)>;
+			low-power-enable;
+		};
+	};
+
+	spi3_default: spi3_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
+				<NRF_PSEL(SPIM_MISO, 0, 24)>;
+		};
+	};
+
+	spi3_sleep: spi3_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
+				<NRF_PSEL(SPIM_MISO, 0, 24)>;
+			low-power-enable;
+		};
+	};
+
+	qspi_default: qspi_default {
+		group1 {
+			psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
+				<NRF_PSEL(QSPI_IO0, 0, 20)>,
+				<NRF_PSEL(QSPI_IO1, 0, 24)>,
+				<NRF_PSEL(QSPI_IO2, 0, 22)>,
+				<NRF_PSEL(QSPI_IO3, 0, 23)>,
+				<NRF_PSEL(QSPI_CSN, 0, 25)>;
+		};
+	};
+
+	qspi_sleep: qspi_sleep {
+		group1 {
+			psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
+				<NRF_PSEL(QSPI_IO0, 0, 20)>,
+				<NRF_PSEL(QSPI_IO1, 0, 24)>,
+				<NRF_PSEL(QSPI_IO2, 0, 22)>,
+				<NRF_PSEL(QSPI_IO3, 0, 23)>,
+				<NRF_PSEL(QSPI_CSN, 0, 25)>;
+			low-power-enable;
+		};
+	};
+};