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ARC: Interrupt latency too large #2879

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@zephyrbot

Reported by Chuck Jordan:

I've observed a slow-down in interrupt handling.

For SOC EM9D, on 8/23/2016, the latency benchmark showed
72 tcs = 3600 nsec
for the time to switch from ISR back to interrupt task.
But today, after changes were made related to unified kernel,
I see:
108 tcs = 5400 nsec
That is a 1.8usec increase PER interrupt. Too much.
I think this is due to the C-function overhead that was added in the Fast Interrupt handling (and RIRQ).

This is impacting SPI devices like an OLED display -- resulting in confused commands and lost of control of the display.

Further, I see that for EM7D, the slower fast interrupt case because only 1 register bank is available, the driver for the OLED display completely malfunctions AND
the Latency Benchmark results in a memerr exception.

(Imported from Jira ZEP-1402)

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area: ARCARC ArchitecturebugThe issue is a bug, or the PR is fixing a bugpriority: lowLow impact/importance bug

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