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ARM Cortex-M SysTick Load value setting off-by-one #15309

@ioannisg

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@ioannisg

When the counter reaches zero, it reloads the value in
SYST_RVR on the next clock edge. This means that if the
LOAD value is N, the interrupt ("tick") is triggered
every N+1 cycles. Therefore, when we operate in non-
tickless mode, we need to configure the LAOD value
with CYC_PER_TICK - 1, in order to get an event
every CYC_PER_TICK cycles.

Reference: https://developer.arm.com/docs/dui0471/l/handling-processor-exceptions/configuring-systick

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    area: ARMARM (32-bit) Architecturearea: TimerTimerbugThe issue is a bug, or the PR is fixing a bugpriority: mediumMedium impact/importance bug

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