Remove nr5m100(risc-v) arch and board source code

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
xiaoxiang781216 · Mar 11, 2021 · c54d617 · c54d617
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diff --git a/Documentation/introduction/detailed_support.rst b/Documentation/introduction/detailed_support.rst
@@ -3020,13 +3020,6 @@ RISC-V
 RISC-V Architectural Support. Basic support for the RISC-V architecture
 was contributed by Ken Pettit in NuttX-7.19.
 
-NEXT RISC-V NR5Mxx
-------------------
-
-This support is for a custom NEXT RISC-V NR5Mxx (RV32IM). The initial release
-is *thin* but a great starting point for anyone interested in RISC-V development with
-NuttX.
-
 GreenWaves GAP8
 ---------------
 

diff --git a/Documentation/introduction/supported_platforms.rst b/Documentation/introduction/supported_platforms.rst
@@ -68,7 +68,6 @@ from board-to-board. Follow the links for the details:
      -
        - :ref:`introduction/detailed_support:RISC-V` (2)
 
-         - :ref:`introduction/detailed_support:NEXT RISC-V NR5Mxx` (1)
          - :ref:`introduction/detailed_support:GreenWaves GAP8` (1)
          - :ref:`introduction/detailed_support:LiteX on Arty A7` (1)
 

diff --git a/Documentation/quickstart/organization.rst b/Documentation/quickstart/organization.rst
@@ -225,8 +225,6 @@ Current architecture/chip directories are summarized below:
 -  ``arch/renesas``: This directory is the home for various
    Renesas architectures, currently only the M16C and vererable
    SuperH-1 architectures.
--  ``arch/risc-v``: This directory supports the RISC-V NR5
-   architecture.
 -  ``arch/xtensa``: This directory supports the Xtensa LX6
    architecture as used by the ESP32.
 -  ``arch/z16f``: Zilog z16f Microcontroller.

diff --git a/README.md b/README.md
@@ -2302,11 +2302,8 @@ Below is a guide to the available README files in the NuttX source tree:
      |   |       `- us7032evb1/
      |   |           `- README.txt
      |   |- risc-v/
-     |   |   |- gap8/
-     |   |   |   `- gapuino/
-     |   |   |       `- README.txt
-     |   |   `-nr5m100/
-     |   |       `- nr5m100-nexys4/
+     |   |   `- gap8/
+     |   |       `- gapuino/
      |   |           `- README.txt
      |   |- sim/
      |   |   `- sim/

diff --git a/arch/README.txt b/arch/README.txt
@@ -258,7 +258,6 @@ arch/risc-v
       arch/risc-v/include/gap8 and arch/risc-v/src/gap8
       arch/risc-v/include/k210 and arch/risc-v/src/k210
       arch/risc-v/include/litex and arch/risc-v/src/litex
-      arch/risc-v/include/nr5m100 and arch/risc-v/src/nr5m100
       arch/risc-v/include/rv32im and arch/risc-v/src/rv32im
       arch/risc-v/include/rv64gc and arch/risc-v/src/rv64gc
 

diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig
@@ -8,7 +8,7 @@ comment "RISC-V Options"
 
 choice
 	prompt "RISC-V chip selection"
-	default ARCH_CHIP_NR5
+	default ARCH_CHIP_RISCV_CUSTOM
 
 config ARCH_CHIP_FE310
 	bool "SiFive FE310"
@@ -31,12 +31,6 @@ config ARCH_CHIP_LITEX
 	---help---
 		Enjoy Digital LITEX VEXRISCV softcore processor (RV32IMA).
 
-config ARCH_CHIP_NR5
-	bool "NEXT NanoRisc5"
-	select ARCH_RV32IM
-	---help---
-		NEXT RISC-V NR5Mxx architectures (RISC-V RV32IM cores).
-
 config ARCH_CHIP_GAP8
 	bool "GreenwavesTechnologies GAP8"
 	select ARCH_RV32IM
@@ -101,22 +95,11 @@ config ARCH_CHIP
 	default "fe310"		if ARCH_CHIP_FE310
 	default "k210"		if ARCH_CHIP_K210
 	default "litex"		if ARCH_CHIP_LITEX
-	default "nr5m100"	if ARCH_CHIP_NR5
 	default "gap8"		if ARCH_CHIP_GAP8
 	default "bl602"		if ARCH_CHIP_BL602
 	default "esp32c3"	if ARCH_CHIP_ESP32C3
 	default "c906"		if ARCH_CHIP_C906
 
-config NR5_MPU
-	bool "MPU support"
-	default n
-	depends on ARCH_HAVE_MPU
-	select ARCH_USE_MPU
-	---help---
-		Build in support for the RISC-V Memory Protection Unit (MPU).
-		Check your chip specifications first; not all RISC-V architectures
-		support the MPU.
-
 if ARCH_RV32IM
 source arch/risc-v/src/rv32im/Kconfig
 endif
@@ -132,9 +115,6 @@ endif
 if ARCH_CHIP_LITEX
 source arch/risc-v/src/litex/Kconfig
 endif
-if ARCH_CHIP_NR5
-source arch/risc-v/src/nr5m100/Kconfig
-endif
 if ARCH_CHIP_GAP8
 source arch/risc-v/src/gap8/Kconfig
 endif

diff --git a/arch/risc-v/include/nr5m100/chip.h b/arch/risc-v/include/nr5m100/chip.h
diff --git a/arch/risc-v/include/nr5m100/irq.h b/arch/risc-v/include/nr5m100/irq.h
diff --git a/arch/risc-v/include/nr5m100/nr5m1xx_irq.h b/arch/risc-v/include/nr5m100/nr5m1xx_irq.h
diff --git a/arch/risc-v/src/gap8/gap8_schedulesigaction.c b/arch/risc-v/src/gap8/gap8_schedulesigaction.c
@@ -49,7 +49,7 @@
 
 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
-#include <arch/nr5m100/irq.h>
+#include <arch/gap8/irq.h>
 
 #include "sched/sched.h"
 #include "riscv_internal.h"