dialects (arm): initialise ARM dialect

[emmau678]

Initialise ARM dialect

[codecov]

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 90.21%. Comparing base (33a9e6a) to head (c32a45f).
Report is 7 commits behind head on main.

Additional details and impacted files

@@           Coverage Diff           @@
##             main    #3455   +/-   ##
=======================================
  Coverage   90.20%   90.21%           
=======================================
  Files         459      462    +3     
  Lines       57631    57717   +86     
  Branches     5564     5565    +1     
=======================================
+ Hits        51984    52067   +83     
- Misses       4201     4203    +2     
- Partials     1446     1447    +1     

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[alexarice]

Mostly small comments

[alexarice]

Don't think there's any reason to have an empty verify

[emmau678]

I only left it in because I've been getting the following error if I take it out:

xdsl/backend/register_type.py:75: in verify
    raise NotImplementedError()
E   NotImplementedError

is this unexpected?

[alexarice]

I missed that your ArmRegisterType inherited from RegisterType. In that case this is fine.

[superlopuh]

Could you please add a comment explaining this?

[superlopuh]

Actually I would say that this is the better place to put the assert name.startswith("x", name) above, and raise a verification error instead

[superlopuh]

We played around with this locally, and our verify-diangostics runs after the parsing, so it's not trivial to do here. I also have a feeling that raising an error here might be a bit premature, and that we would probably benefit from building more infrastructure here to see how we deal with the weirdnesses of ARM registers before doing the verification.

[superlopuh]

Code looks great! Would just need two small tests to make sure that the behaviour is what we expect, one with valid registers, and one without:

"test.op"() {unallocated = !arm.reg} : () -> ()
"test.op"() {allocated = !arm.reg<x1>} : () -> ()

// -----

"test.op"() {error = !arm.reg<error>} : () -> ()

These can be in the same file, would just need to add --split-input-file and --verify-diagnostics to make sure that it can match successfully

[superlopuh]

W pair programmed the latest changes with @emmau678, would love a review from @compor or @alexarice to merge!

[alexarice]

Seems good to me (have left 1 small nit)