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Refactor instruction meta #7

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merged 15 commits into from
Jul 18, 2021
Merged

Refactor instruction meta #7

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1c17e99
Add instruction attributes for lock, rep, etc.
ZehMatt Jul 14, 2021
df6f050
Add basic support for labels and move meta info into bindings
ZehMatt Jul 14, 2021
af6312a
Initial refactor work for agnostic instruction meta info
ZehMatt Jul 15, 2021
8d91980
Automatically validate instruction meta when decoded, more data
ZehMatt Jul 15, 2021
c3c7920
Fix 32 bit and refactor some types
ZehMatt Jul 15, 2021
0d59e89
Add native register sized aliases to simplify x86/x64 patterns
ZehMatt Jul 15, 2021
e6089a0
Add some missing control flow instructions
ZehMatt Jul 15, 2021
793d6e6
Implement methods to obtain bound label offsets
ZehMatt Jul 15, 2021
a4f04f1
Fix unable to modify/set registers for 32 bit
ZehMatt Jul 15, 2021
e810468
Add getter for label offset after encoding
ZehMatt Jul 15, 2021
9ca28f3
Fix wrong type
ZehMatt Jul 15, 2021
691aa89
Use UIntptr for thread handles
ZehMatt Jul 15, 2021
eff1d63
Add instruction meta for cond jmps
ZehMatt Jul 15, 2021
759aabb
Update example plugin
ZehMatt Jul 15, 2021
fe75b5e
Fix copy paste mistake
ZehMatt Jul 15, 2021
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Add native register sized aliases to simplify x86/x64 patterns
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@ZehMatt
ZehMatt committed Jul 15, 2021
commit 0d59e89a1b793f5a635ea50215df680cf4b0096b
19 changes: 3 additions & 16 deletions bin/dotplugins/myplugin/AssemblerTest.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,7 @@ public AssemblerTest()
[Command("TestAssembler")]
public void BasicAssembly(string[] args)
{
#if _X64_
nuint ip = Thread.Active.Rip;
#else
nuint ip = Thread.Active.Eip;
#endif

nuint ip = Thread.Active.Nip;
using (var asm = new Assembler(ip))
{
#if _X64_
Expand Down Expand Up @@ -67,11 +62,7 @@ public void BasicAssembly(string[] args)
public void EncodeIntoAssembler(string[] args)
{
var decoder = Decoder.Create();
#if _X64_
nuint ip = Thread.Active.Rip;
#else
nuint ip = Thread.Active.Eip;
#endif
nuint ip = Thread.Active.Nip;
var asm = new Assembler(ip);

var instr = decoder.Decode(ip);
Expand All @@ -92,11 +83,7 @@ public void EncodeIntoAssembler(string[] args)
[Command("AssembleWithLabel")]
public void AssemblerWithLabels(string[] args)
{
#if _X64_
nuint ip = Thread.Active.Rip;
#else
nuint ip = Thread.Active.Eip;
#endif
nuint ip = Thread.Active.Nip;

var asm = new Assembler(ip);

Expand Down
6 changes: 1 addition & 5 deletions bin/dotplugins/myplugin/MyPlugin.Expressions.cs
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Expand Up @@ -9,11 +9,7 @@ public nuint MyExpr1()
var th = Thread.Active;
if (th != null)
{
#if _X64_
return (nuint)th.Rip;
#else
return (nuint)th.Eip;
#endif
return th.Nip;
}
else
Console.WriteLine("No active thread");
Expand Down
20 changes: 5 additions & 15 deletions bin/dotplugins/myplugin/MyPlugin.cs
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Expand Up @@ -83,16 +83,14 @@ public void OnHotload()
#if _X64_
mainThread.Rax = 0xFFFFFFFFFFFFFFFF;
Console.WriteLine($"Rax = {mainThread.Rax:X}");

Console.WriteLine($"Eax = {mainThread.Eax:X}");
mainThread.Eax++;
Console.WriteLine($"Eax = {mainThread.Eax:X}");

#else
mainThread.Eax = 0xFFFFFFF;
Console.WriteLine($"Rax = {mainThread.Eax:X}");
#endif

Console.WriteLine($"Eax = {mainThread.Eax:X}");
mainThread.Eax++;
Console.WriteLine($"Eax = {mainThread.Eax:X}");

Console.WriteLine($"Ax = {mainThread.Ax:X}");
mainThread.Ax++;
Expand All @@ -106,17 +104,9 @@ public void OnHotload()
mainThread.Al++;
Console.WriteLine($"Al = {mainThread.Al:X}");

#if _X64_
Console.WriteLine($"Rax = {mainThread.Rax:X}");
#else
Console.WriteLine($"Rax = {mainThread.Eax:X}");
#endif
Console.WriteLine($"Rax = {mainThread.Nax:X}");

#if _X64_
var res = Memory.Read(mainThread.Rip, 22);
#else
var res = Memory.Read(mainThread.Eip, 22);
#endif
var res = Memory.Read(mainThread.Nip, 22);
Console.WriteLine("Data: {0}", res);
}

Expand Down
4 changes: 2 additions & 2 deletions src/Bindings/Decoder.cpp
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Expand Up @@ -358,12 +358,12 @@ namespace Dotx64Dbg {
#if _M_X64
if (regId == Register::RFlags)
{
regName = "HFlags";
regName = "NFlags";
}
#else
if (regId == Register::EFlags)
{
regName = "HFlags";
regName = "NFlags";
}
#endif

Expand Down
56 changes: 28 additions & 28 deletions src/Bindings/Instruction.Meta.hpp
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12 changes: 12 additions & 0 deletions src/Bindings/Instruction.Operands.hpp
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Expand Up @@ -319,6 +319,7 @@ namespace Dotx64Dbg {
static initonly Operand::OpReg^ R13d = gcnew Operand::OpReg(Register::R13d);
static initonly Operand::OpReg^ R14d = gcnew Operand::OpReg(Register::R14d);
static initonly Operand::OpReg^ R15d = gcnew Operand::OpReg(Register::R15d);

#if _M_X64
// General purpose registers 64-bit
static initonly Operand::OpReg^ Rax = gcnew Operand::OpReg(Register::Rax);
Expand Down Expand Up @@ -541,6 +542,17 @@ namespace Dotx64Dbg {
static initonly Operand::OpReg^ Mxcsr = gcnew Operand::OpReg(Register::Mxcsr);
static initonly Operand::OpReg^ Pkru = gcnew Operand::OpReg(Register::Pkru);
static initonly Operand::OpReg^ Xcr0 = gcnew Operand::OpReg(Register::Xcr0);
// Host specific
static initonly Operand::OpReg^ Nax = gcnew Operand::OpReg(Register::Nax);
static initonly Operand::OpReg^ Ncx = gcnew Operand::OpReg(Register::Ncx);
static initonly Operand::OpReg^ Ndx = gcnew Operand::OpReg(Register::Ndx);
static initonly Operand::OpReg^ Nbx = gcnew Operand::OpReg(Register::Nbx);
static initonly Operand::OpReg^ Nsp = gcnew Operand::OpReg(Register::Nsp);
static initonly Operand::OpReg^ Nbp = gcnew Operand::OpReg(Register::Nbp);
static initonly Operand::OpReg^ Nsi = gcnew Operand::OpReg(Register::Nsi);
static initonly Operand::OpReg^ Ndi = gcnew Operand::OpReg(Register::Ndi);
static initonly Operand::OpReg^ Nip = gcnew Operand::OpReg(Register::Nip);
static initonly Operand::OpReg^ NFlags = gcnew Operand::OpReg(Register::NFlags);

static Operand::OpReg^ Reg(Register reg)
{
Expand Down
72 changes: 36 additions & 36 deletions src/Bindings/Register.hpp
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Expand Up @@ -363,43 +363,43 @@ namespace Dotx64Dbg {

// Host Aliases
#ifdef _M_AMD64
Hax = Rax,
Hcx = Rcx,
Hdx = Rdx,
Hbx = Rbx,
Hsp = Rsp,
Hbp = Rbp,
Hsi = Rsi,
Hdi = Rdi,
H8 = R8,
H9 = R9,
H10 = R10,
H11 = R11,
H12 = R12,
H13 = R13,
H14 = R14,
H15 = R15,
Hip = Rip,
HFlags = RFlags,
Nax = Rax,
Ncx = Rcx,
Ndx = Rdx,
Nbx = Rbx,
Nsp = Rsp,
Nbp = Rbp,
Nsi = Rsi,
Ndi = Rdi,
N8 = R8,
N9 = R9,
N10 = R10,
N11 = R11,
N12 = R12,
N13 = R13,
N14 = R14,
N15 = R15,
Nip = Rip,
NFlags = RFlags,
#else
Hax = Eax,
Hcx = Ecx,
Hdx = Edx,
Hbx = Ebx,
Hsp = Esp,
Hbp = Ebp,
Hsi = Esi,
Hdi = Edi,
H8 = R8d,
H9 = R9d,
H10 = R10d,
H11 = R11d,
H12 = R12d,
H13 = R13d,
H14 = R14d,
H15 = R15d,
Hip = Eip,
HFlags = EFlags,
Nax = Eax,
Ncx = Ecx,
Ndx = Edx,
Nbx = Ebx,
Nsp = Esp,
Nbp = Ebp,
Nsi = Esi,
Ndi = Edi,
N8 = R8d,
N9 = R9d,
N10 = R10d,
N11 = R11d,
N12 = R12d,
N13 = R13d,
N14 = R14d,
N15 = R15d,
Nip = Eip,
NFlags = EFlags,
#endif
};

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