[rv_dm,dv] Avoid a fast JTAG clock

If the JTAG clock runs much faster than the system clock then things
can get a bit out of sync for DMI accesses. This is tracked in an
issue in the pulp-dbg module that we vendor.

Tightening the constraint slightly like this should avoid the issue
that led to the problem in the first place (where the system clock was
at 25MHz and the JTAG tck ran at about 100MHz).

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>

hw/ip/rv_dm/dv/env/seq_lib/rv_dm_base_vseq.sv

@@ -19,9 +19,9 @@ class rv_dm_base_vseq extends cip_base_vseq #(
   rand int unsigned tck_period_ps;
   constraint tck_period_ps_c {
     tck_period_ps dist {
-      [10_000:20_000] :/ 1,  // 50-100MHz
-      [20_001:42_000] :/ 1,  // 24-50MHz
-      [42_001:100_000] :/ 1  // 10-24MHz
+      [100_000:200_000] :/ 1,  // 5-10MHz
+      [200_001:420_000] :/ 1,  // 2.4-5MHz
+      [420_001:1000_000] :/ 1  // 1-2.4MHz
     };
   }